From patchwork Thu Feb 13 15:21:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 231396 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16810C3B189 for ; Thu, 13 Feb 2020 15:49:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D7CC420661 for ; Thu, 13 Feb 2020 15:49:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1581608997; bh=5d8vTwSTKLpkNP5dmN6PxFU8quK9Vs/L1w1NZ9OmVyE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=0RWXNishd5hvw4+GEcn9DaCOJi0F2V17ibH/ktlqsnQC9HwxEnOcS1wtOQvbEW62E QqSolkggwW6SJKUGhc8BsP6KhfXHsZySg6/o8pmq5DixYXHhXlU/IY70dRPjwCVXzv gsdu1gjHUyX3UA+z7A99HfdM4zgflmtP7jS75W1M= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387607AbgBMP0g (ORCPT ); Thu, 13 Feb 2020 10:26:36 -0500 Received: from mail.kernel.org ([198.145.29.99]:45956 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387595AbgBMP0e (ORCPT ); Thu, 13 Feb 2020 10:26:34 -0500 Received: from localhost (unknown [104.132.1.104]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id A05D1222C2; Thu, 13 Feb 2020 15:26:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1581607592; bh=5d8vTwSTKLpkNP5dmN6PxFU8quK9Vs/L1w1NZ9OmVyE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NpUkleZNEm+f0rTgf33f3FaOlGWqXIijtiAa3e1cSTVjN0i+L9wB4Kx9JwoGpYYeX BIsw7yIayxwBAZLXyEfiTmWCQWg7+pf0JlQu/gVjzqakl81xmtZtfE/SpFHTi+pbc5 d3yiNshGCHC/BdnNqouccpNN9ZYLGi7ItimmXe+0= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Ingo van Lil , Peter Rosin , Alexandre Belloni Subject: [PATCH 4.19 24/52] ARM: dts: at91: Reenable UART TX pull-ups Date: Thu, 13 Feb 2020 07:21:05 -0800 Message-Id: <20200213151820.267903624@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200213151810.331796857@linuxfoundation.org> References: <20200213151810.331796857@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Ingo van Lil commit 9d39d86cd4af2b17b970d63307daad71f563d207 upstream. Pull-ups for SAM9 UART/USART TX lines were disabled in a previous commit. However, several chips in the SAM9 family require pull-ups to prevent the TX lines from falling (and causing an endless break condition) when the transceiver is disabled. >From the SAM9G20 datasheet, 32.5.1: "To prevent the TXD line from falling when the USART is disabled, the use of an internal pull up is mandatory.". This commit reenables the pull-ups for all chips having that sentence in their datasheets. Fixes: 5e04822f7db5 ("ARM: dts: at91: fixes uart pinctrl, set pullup on rx, clear pullup on tx") Signed-off-by: Ingo van Lil Cc: Peter Rosin Link: https://lore.kernel.org/r/20191203142147.875227-1-inguin@gmx.de Signed-off-by: Alexandre Belloni Signed-off-by: Greg Kroah-Hartman --- arch/arm/boot/dts/at91sam9260.dtsi | 12 ++++++------ arch/arm/boot/dts/at91sam9261.dtsi | 6 +++--- arch/arm/boot/dts/at91sam9263.dtsi | 6 +++--- arch/arm/boot/dts/at91sam9g45.dtsi | 8 ++++---- arch/arm/boot/dts/at91sam9rl.dtsi | 8 ++++---- 5 files changed, 20 insertions(+), 20 deletions(-) --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi @@ -434,7 +434,7 @@ usart0 { pinctrl_usart0: usart0-0 { atmel,pins = - ; }; @@ -468,7 +468,7 @@ usart1 { pinctrl_usart1: usart1-0 { atmel,pins = - ; }; @@ -486,7 +486,7 @@ usart2 { pinctrl_usart2: usart2-0 { atmel,pins = - ; }; @@ -504,7 +504,7 @@ usart3 { pinctrl_usart3: usart3-0 { atmel,pins = - ; }; @@ -522,7 +522,7 @@ uart0 { pinctrl_uart0: uart0-0 { atmel,pins = - ; }; }; @@ -530,7 +530,7 @@ uart1 { pinctrl_uart1: uart1-0 { atmel,pins = - ; }; }; --- a/arch/arm/boot/dts/at91sam9261.dtsi +++ b/arch/arm/boot/dts/at91sam9261.dtsi @@ -328,7 +328,7 @@ usart0 { pinctrl_usart0: usart0-0 { atmel,pins = - , + , ; }; @@ -346,7 +346,7 @@ usart1 { pinctrl_usart1: usart1-0 { atmel,pins = - , + , ; }; @@ -364,7 +364,7 @@ usart2 { pinctrl_usart2: usart2-0 { atmel,pins = - , + , ; }; --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi @@ -437,7 +437,7 @@ usart0 { pinctrl_usart0: usart0-0 { atmel,pins = - ; }; @@ -455,7 +455,7 @@ usart1 { pinctrl_usart1: usart1-0 { atmel,pins = - ; }; @@ -473,7 +473,7 @@ usart2 { pinctrl_usart2: usart2-0 { atmel,pins = - ; }; --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -555,7 +555,7 @@ usart0 { pinctrl_usart0: usart0-0 { atmel,pins = - ; }; @@ -573,7 +573,7 @@ usart1 { pinctrl_usart1: usart1-0 { atmel,pins = - ; }; @@ -591,7 +591,7 @@ usart2 { pinctrl_usart2: usart2-0 { atmel,pins = - ; }; @@ -609,7 +609,7 @@ usart3 { pinctrl_usart3: usart3-0 { atmel,pins = - ; }; --- a/arch/arm/boot/dts/at91sam9rl.dtsi +++ b/arch/arm/boot/dts/at91sam9rl.dtsi @@ -681,7 +681,7 @@ usart0 { pinctrl_usart0: usart0-0 { atmel,pins = - , + , ; }; @@ -720,7 +720,7 @@ usart1 { pinctrl_usart1: usart1-0 { atmel,pins = - , + , ; }; @@ -743,7 +743,7 @@ usart2 { pinctrl_usart2: usart2-0 { atmel,pins = - , + , ; }; @@ -766,7 +766,7 @@ usart3 { pinctrl_usart3: usart3-0 { atmel,pins = - , + , ; };