From patchwork Mon Feb 3 16:19:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 232216 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6CD3C35249 for ; Mon, 3 Feb 2020 16:29:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 84A2B2087E for ; Mon, 3 Feb 2020 16:29:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580747381; bh=CslaSSQI+Lm9q11vj17D/LgMKJ+dG/2Gb2LaHCRJXVo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=e3MhAwGSEGF965c/Ga9ld08SIHEs0KRSGzHkskRvEU1G3DoNspY8Mqig4G9ylhC9b wi5jFeGK1f2issqA0E6H6cjzqTOS4o6xWDBOi6j1MGJ61jUfUUJWt5uSdiZnxCkJj9 Hp5y9v4LA4v+CAUZnNXQBgliE9lIxVpHLBSEFmxE= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729827AbgBCQ3j (ORCPT ); Mon, 3 Feb 2020 11:29:39 -0500 Received: from mail.kernel.org ([198.145.29.99]:41656 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729822AbgBCQ3i (ORCPT ); Mon, 3 Feb 2020 11:29:38 -0500 Received: from localhost (unknown [104.132.45.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 546EC21744; Mon, 3 Feb 2020 16:29:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580747377; bh=CslaSSQI+Lm9q11vj17D/LgMKJ+dG/2Gb2LaHCRJXVo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wEEu/3zPBe0+yhqf9ntF9sICck6z70lbZ+YdSbSGm+Gcc7MEbHWGtwivIc351bB1h b/UiL8Duf3JTf+mVX1Mw6bPbN/pq209pNHV1Elpap++c2Uww3GIAq/d7JzdSOxk+Qx byzxGF+/D4/Rqhd8hrbGp7GYZCI9S0CwCR7EnqEU= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Lubomir Rintel , Stephen Boyd , Olof Johansson , Sasha Levin Subject: [PATCH 4.14 57/89] clk: mmp2: Fix the order of timer mux parents Date: Mon, 3 Feb 2020 16:19:42 +0000 Message-Id: <20200203161924.254260816@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200203161916.847439465@linuxfoundation.org> References: <20200203161916.847439465@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Lubomir Rintel [ Upstream commit 8bea5ac0fbc5b2103f8779ddff216122e3c2e1ad ] Determined empirically, no documentation is available. The OLPC XO-1.75 laptop used parent 1, that one being VCTCXO/4 (65MHz), but thought it's a VCTCXO/2 (130MHz). The mmp2 timer driver, not knowing what is going on, ended up just dividing the rate as of commit f36797ee4380 ("ARM: mmp/mmp2: dt: enable the clock")' Link: https://lore.kernel.org/r/20191218190454.420358-3-lkundrak@v3.sk Signed-off-by: Lubomir Rintel Acked-by: Stephen Boyd Signed-off-by: Olof Johansson Signed-off-by: Sasha Levin --- drivers/clk/mmp/clk-of-mmp2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/mmp/clk-of-mmp2.c b/drivers/clk/mmp/clk-of-mmp2.c index d083b860f0833..10689d8cd3867 100644 --- a/drivers/clk/mmp/clk-of-mmp2.c +++ b/drivers/clk/mmp/clk-of-mmp2.c @@ -134,7 +134,7 @@ static DEFINE_SPINLOCK(ssp3_lock); static const char *ssp_parent_names[] = {"vctcxo_4", "vctcxo_2", "vctcxo", "pll1_16"}; static DEFINE_SPINLOCK(timer_lock); -static const char *timer_parent_names[] = {"clk32", "vctcxo_2", "vctcxo_4", "vctcxo"}; +static const char *timer_parent_names[] = {"clk32", "vctcxo_4", "vctcxo_2", "vctcxo"}; static DEFINE_SPINLOCK(reset_lock);