From patchwork Mon Feb 3 16:19:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 232203 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04C37C35247 for ; Mon, 3 Feb 2020 16:32:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D00AD21744 for ; Mon, 3 Feb 2020 16:32:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580747529; bh=LrvctqCs+jpeiY2nmFR4hY+AgvccpecI98ObAdzfOmU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=cYb6rlH39WQy3sY+nsIooCvWaCmwtobe2x904MSg+S47wJ0VO8rw0X9O6Yx2sH2jb ZvgG39iK6+BJJJcjJNM2ZoemQEYrakqECR1/1K6nXsTLduQm7jC3BarpgACZmAWeye yeVhWO/eeQ2hRhJOWCgmqSAjUZtzHm6WBY9bKm4w= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730370AbgBCQcI (ORCPT ); Mon, 3 Feb 2020 11:32:08 -0500 Received: from mail.kernel.org ([198.145.29.99]:45754 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730366AbgBCQcI (ORCPT ); Mon, 3 Feb 2020 11:32:08 -0500 Received: from localhost (unknown [104.132.45.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7465221927; Mon, 3 Feb 2020 16:32:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580747527; bh=LrvctqCs+jpeiY2nmFR4hY+AgvccpecI98ObAdzfOmU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=1ESNN3nJx6HjSr94U/jhDTbM8Ir3LX2/vK6wGa7Z3mhZKa4cG6JVpZe/AIFgEdn0Y O/v6P2+jtJHYcUzet0TEQXbVVV4NUWJn3xoxyaQGiwJV6np1JwjURrirn77B3qgtDg JljRkYMASKDo9ZjiNTJAfasaOajkktpqqOE0MaFQ= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Samuel Holland , Maxime Ripard , Sasha Levin Subject: [PATCH 4.19 31/70] clk: sunxi-ng: h6-r: Fix AR100/R_APB2 parent order Date: Mon, 3 Feb 2020 16:19:43 +0000 Message-Id: <20200203161917.059862972@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200203161912.158976871@linuxfoundation.org> References: <20200203161912.158976871@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Samuel Holland [ Upstream commit 0c545240aebc2ccb8f661dc54283a14d64659804 ] According to the BSP source code, both the AR100 and R_APB2 clocks have PLL_PERIPH0 as mux index 3, not 2 as it was on previous chips. The pre- divider used for PLL_PERIPH0 should be changed to index 3 to match. This was verified by running a rough benchmark on the AR100 with various clock settings: | mux | pre-divider | iterations/second | clock source | |=====|=============|===================|==============| | 0 | 0 | 19033 (stable) | osc24M | | 2 | 5 | 11466 (unstable) | iosc/osc16M | | 2 | 17 | 11422 (unstable) | iosc/osc16M | | 3 | 5 | 85338 (stable) | pll-periph0 | | 3 | 17 | 27167 (stable) | pll-periph0 | The relative performance numbers all match up (with pll-periph0 running at its default 600MHz). Signed-off-by: Samuel Holland Signed-off-by: Maxime Ripard Signed-off-by: Sasha Levin --- drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c index 8d05d4f1f8a1e..28b84c701a7d2 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c @@ -23,9 +23,9 @@ */ static const char * const ar100_r_apb2_parents[] = { "osc24M", "osc32k", - "pll-periph0", "iosc" }; + "iosc", "pll-periph0" }; static const struct ccu_mux_var_prediv ar100_r_apb2_predivs[] = { - { .index = 2, .shift = 0, .width = 5 }, + { .index = 3, .shift = 0, .width = 5 }, }; static struct ccu_div ar100_clk = {