From patchwork Mon Feb 3 16:19:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 232094 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE18CC35247 for ; Mon, 3 Feb 2020 16:47:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B0B2E20721 for ; Mon, 3 Feb 2020 16:47:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580748445; bh=xOSw62RuoXWZIX9+LIKWM+wn6MT42/NMjSbT1nptbSA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=HrUvkIinM4Z6IrzonXrn2CLAvmSh3I205bDfO2f4bkyXDq5VGYEJRpMsyaSD8gBsD uhusUCWRat0ZtZuiiDw/d4fpmQOSG+UZ+ydb2h55UInZckPCZVDkSNOr4yM06CwwEu QDPwNrV9h6NWTPODhd/9KB14EYadwfiWC2v8NAvE= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729425AbgBCQ1c (ORCPT ); Mon, 3 Feb 2020 11:27:32 -0500 Received: from mail.kernel.org ([198.145.29.99]:38816 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729420AbgBCQ1c (ORCPT ); Mon, 3 Feb 2020 11:27:32 -0500 Received: from localhost (unknown [104.132.45.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C9C292051A; Mon, 3 Feb 2020 16:27:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580747251; bh=xOSw62RuoXWZIX9+LIKWM+wn6MT42/NMjSbT1nptbSA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OPcNxugwH5nMMmIUzjoTZ94d3OkxnAYjdTI7l3+o0b/bY094mHIXA5zU8V2ttNkYf 3rwsUntAg21w87SXrYEjlaVlY93TpXOGuBDnlSWTDoivPyjEErH7H8NSfKZ4GSNYbX 5uN75wPcCxURu1u+fbYLi+OrQBrq1Y884hM2VtsU= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Marc Zyngier , Vladimir Murzin , Russell King , Sasha Levin Subject: [PATCH 4.9 54/68] ARM: 8955/1: virt: Relax arch timer version check during early boot Date: Mon, 3 Feb 2020 16:19:50 +0000 Message-Id: <20200203161913.878648447@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200203161904.705434837@linuxfoundation.org> References: <20200203161904.705434837@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Vladimir Murzin [ Upstream commit 6849b5eba1965ceb0cad3a75877ef4569dd3638e ] Updates to the Generic Timer architecture allow ID_PFR1.GenTimer to have values other than 0 or 1 while still preserving backward compatibility. At the moment, Linux is quite strict in the way it handles this field at early boot and will not configure arch timer if it doesn't find the value 1. Since here use ubfx for arch timer version extraction (hyb-stub build with -march=armv7-a, so it is safe) To help backports (even though the code was correct at the time of writing) Fixes: 8ec58be9f3ff ("ARM: virt: arch_timers: enable access to physical timers") Acked-by: Marc Zyngier Signed-off-by: Vladimir Murzin Signed-off-by: Russell King Signed-off-by: Sasha Levin --- arch/arm/kernel/hyp-stub.S | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S index f5e5e3e196592..f587681a9553c 100644 --- a/arch/arm/kernel/hyp-stub.S +++ b/arch/arm/kernel/hyp-stub.S @@ -158,10 +158,9 @@ ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE #if !defined(ZIMAGE) && defined(CONFIG_ARM_ARCH_TIMER) @ make CNTP_* and CNTPCT accessible from PL1 mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1 - lsr r7, #16 - and r7, #0xf - cmp r7, #1 - bne 1f + ubfx r7, r7, #16, #4 + teq r7, #0 + beq 1f mrc p15, 4, r7, c14, c1, 0 @ CNTHCTL orr r7, r7, #3 @ PL1PCEN | PL1PCTEN mcr p15, 4, r7, c14, c1, 0 @ CNTHCTL