From patchwork Tue Jan 28 14:05:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 232553 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1FD84C2D0DB for ; Tue, 28 Jan 2020 14:36:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DF07820702 for ; Tue, 28 Jan 2020 14:36:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580222204; bh=CkSWa3+tm2tcfSWRmOI5hOneByH/GcjVShb/+UDPSb4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=HBdpbDuNzJPMEvPvmqWsTc7Pe0cwlygz4rVkBjL6WZppuqduinh1MxTktSNRIg3vR B2wtBTKl4bF48xgkHvYN+XUTeGzJTgQ7dVVJpcvjdDeP8rmh4kfJk49QdDJbsBYzLT d4upf6lMx9JsRFe9wUfVt7SjJE6GrF+4Eam7hDi0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730853AbgA1OVT (ORCPT ); Tue, 28 Jan 2020 09:21:19 -0500 Received: from mail.kernel.org ([198.145.29.99]:46602 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731074AbgA1OVT (ORCPT ); Tue, 28 Jan 2020 09:21:19 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0BC1924688; Tue, 28 Jan 2020 14:21:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580221278; bh=CkSWa3+tm2tcfSWRmOI5hOneByH/GcjVShb/+UDPSb4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=T84+7HuPgnb0t+ti29VsS3hrZXmI8nJrIXyYUfz96P7DqBH1cPMRDK6V6ZEzwjqpH 7u9EPLR45uygckEhOpW4Hj5gFd4ToVIeXBuxO1Q71Nw+hWLDyQkGnqCudjBuGNHOLD Vf+Zcta9K2kV1tT7wJbsbMYeL8xzolXp8znzYWZ0= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Andy Shevchenko , Vinod Koul , Sasha Levin Subject: [PATCH 4.9 161/271] dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width" Date: Tue, 28 Jan 2020 15:05:10 +0100 Message-Id: <20200128135904.561198424@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200128135852.449088278@linuxfoundation.org> References: <20200128135852.449088278@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Andy Shevchenko [ Upstream commit c24a5c735f87d0549060de31367c095e8810b895 ] The commit 080edf75d337 ("dmaengine: hsu: set HSU_CH_MTSR to memory width") has been mistakenly submitted. The further investigations show that the original code does better job since the memory side transfer size has never been configured by DMA users. As per latest revision of documentation: "Channel minimum transfer size (CHnMTSR)... For IOSF UART, maximum value that can be programmed is 64 and minimum value that can be programmed is 1." This reverts commit 080edf75d337d35faa6fc3df99342b10d2848d16. Fixes: 080edf75d337 ("dmaengine: hsu: set HSU_CH_MTSR to memory width") Signed-off-by: Andy Shevchenko Signed-off-by: Vinod Koul Signed-off-by: Sasha Levin --- drivers/dma/hsu/hsu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/dma/hsu/hsu.c b/drivers/dma/hsu/hsu.c index 29d04ca71d52e..15525a2b8ebd7 100644 --- a/drivers/dma/hsu/hsu.c +++ b/drivers/dma/hsu/hsu.c @@ -64,10 +64,10 @@ static void hsu_dma_chan_start(struct hsu_dma_chan *hsuc) if (hsuc->direction == DMA_MEM_TO_DEV) { bsr = config->dst_maxburst; - mtsr = config->src_addr_width; + mtsr = config->dst_addr_width; } else if (hsuc->direction == DMA_DEV_TO_MEM) { bsr = config->src_maxburst; - mtsr = config->dst_addr_width; + mtsr = config->src_addr_width; } hsu_chan_disable(hsuc);