From patchwork Tue Jan 28 14:02:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 232677 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ECD99C33CB2 for ; Tue, 28 Jan 2020 14:15:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B9DE620678 for ; Tue, 28 Jan 2020 14:15:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580220928; bh=PGmNPiL5hMFxFMpTlKmrdEz3b+5gbAEKuPO59Hgo7TQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=lT9AqKLfaa2hgYc1zfdyCtYPTGYn5LDQ+tZmI2fZUMvpeS/JcN01q3vRdQVvcEsX2 PsELZ320qraYMxoqIFoP5U96u3Xsm620VWun/lw9Jn8eHaeQ78Q195ZeC1UHFKz8Eu ofNIAaklwjdiFRo36nkxFzAE8SQc6unqSq6K4eII= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729555AbgA1OP1 (ORCPT ); Tue, 28 Jan 2020 09:15:27 -0500 Received: from mail.kernel.org ([198.145.29.99]:38142 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726384AbgA1OP0 (ORCPT ); Tue, 28 Jan 2020 09:15:26 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 24BC120678; Tue, 28 Jan 2020 14:15:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580220925; bh=PGmNPiL5hMFxFMpTlKmrdEz3b+5gbAEKuPO59Hgo7TQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JRex3j7991Rx5WiICCHp2Gr+/9McbicHBfXybrOJrJLxWde8tcgNQhhoAtE/plshZ IBVWzqhzeXeuytH1Jk85F94SqbaucBr3nybvc6VK6vQaubaF85RGvqvNaKVd9XUhmJ frv5H/NtSRH7Z+HeWndTocW7ViecaHZYwdjatPpg= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Geert Uytterhoeven , Simon Horman , Sasha Levin Subject: [PATCH 4.9 019/271] pinctrl: sh-pfc: r8a7791: Remove bogus marks from vin1_b_data18 group Date: Tue, 28 Jan 2020 15:02:48 +0100 Message-Id: <20200128135854.100891102@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200128135852.449088278@linuxfoundation.org> References: <20200128135852.449088278@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Geert Uytterhoeven [ Upstream commit 0d6256cb880166a4111bebce35790019e56b6e1b ] The vin1_b_data18_mux[] arrays contains pin marks for the 2 LSB bits of the color components. The vin1_b_data18_pins[] array rightfully does not include the corresponding pin numbers, as RGB18 is subset of RGB24, containing only the 6 MSB bits of each component. Fixes: 8e32c9671f84acd8 ("pinctrl: sh-pfc: r8a7791: Add VIN pins") Signed-off-by: Geert Uytterhoeven Reviewed-by: Simon Horman Signed-off-by: Sasha Levin --- drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c index fcf731994811f..1e7f32b5dce8c 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c @@ -4264,17 +4264,14 @@ static const unsigned int vin1_b_data18_pins[] = { }; static const unsigned int vin1_b_data18_mux[] = { /* B */ - VI1_DATA0_B_MARK, VI1_DATA1_B_MARK, VI1_DATA2_B_MARK, VI1_DATA3_B_MARK, VI1_DATA4_B_MARK, VI1_DATA5_B_MARK, VI1_DATA6_B_MARK, VI1_DATA7_B_MARK, /* G */ - VI1_G0_B_MARK, VI1_G1_B_MARK, VI1_G2_B_MARK, VI1_G3_B_MARK, VI1_G4_B_MARK, VI1_G5_B_MARK, VI1_G6_B_MARK, VI1_G7_B_MARK, /* R */ - VI1_R0_B_MARK, VI1_R1_B_MARK, VI1_R2_B_MARK, VI1_R3_B_MARK, VI1_R4_B_MARK, VI1_R5_B_MARK, VI1_R6_B_MARK, VI1_R7_B_MARK,