From patchwork Fri Jan 24 09:27:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 233003 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B8C0C2D0DB for ; Fri, 24 Jan 2020 11:15:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0980C2077C for ; Fri, 24 Jan 2020 11:15:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579864511; bh=fkh3FgWL0E1pUimUwrTS1dFv2ZIouiEsPk4F+mvnZao=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=To/hlhsUtVRy4gS6Ubj0hp2RSC+Bg0GKRUvLIEFL4/v7q6y/LnRU9kcT7KhQ35RO3 zWSaoFLTRHXNQiH5Eq9cbNZyh47toGnkwlPTMP35o/CQntuO4CfZaGVlWznkNAeaaC ZtcHikpP71pgxXqY4N6+nkKtllAzD2kP7YFDgFi4= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390226AbgAXLOi (ORCPT ); Fri, 24 Jan 2020 06:14:38 -0500 Received: from mail.kernel.org ([198.145.29.99]:50990 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389867AbgAXLOg (ORCPT ); Fri, 24 Jan 2020 06:14:36 -0500 Received: from localhost (ip-213-127-102-57.ip.prioritytelecom.net [213.127.102.57]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E21F22467B; Fri, 24 Jan 2020 11:14:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579864475; bh=fkh3FgWL0E1pUimUwrTS1dFv2ZIouiEsPk4F+mvnZao=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NG72FXYxFJfF2MiIjEW4jk0+obufLa6knM9TdtJ0wjO8YrGsZ3QQ8U1zx3KhVoZVJ 0FAvfdOATPLDkXLZCU/XEl7dkCru/yyWd7dwHcPA5GQwyS/nUSgdaSGNccuRmi49IL Y+Ce+MhdMzE3uL5hXQi34FoXZnb5oS6xi09NBMVI= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Phil Reid , liweihang , Heiner Kallweit , Florian Fainelli , "David S. Miller" , Sasha Levin Subject: [PATCH 4.19 276/639] net: phy: dont clear BMCR in genphy_soft_reset Date: Fri, 24 Jan 2020 10:27:26 +0100 Message-Id: <20200124093121.384723051@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200124093047.008739095@linuxfoundation.org> References: <20200124093047.008739095@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Heiner Kallweit [ Upstream commit d29f5aa0bc0c321e1b9e4658a2a7e08e885da52a ] So far we effectively clear the BMCR register. Some PHY's can deal with this (e.g. because they reset BMCR to a default as part of a soft-reset) whilst on others this causes issues because e.g. the autoneg bit is cleared. Marvell is an example, see also thread [0]. So let's be a little bit more gentle and leave all bits we're not interested in as-is. This change is needed for PHY drivers to properly deal with the original patch. [0] https://marc.info/?t=155264050700001&r=1&w=2 Fixes: 6e2d85ec0559 ("net: phy: Stop with excessive soft reset") Tested-by: Phil Reid Tested-by: liweihang Signed-off-by: Heiner Kallweit Reviewed-by: Florian Fainelli Signed-off-by: David S. Miller Signed-off-by: Sasha Levin --- drivers/net/phy/phy_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index 9c7e51443f6b6..ae40d8137fd20 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c @@ -1657,7 +1657,7 @@ int genphy_soft_reset(struct phy_device *phydev) { int ret; - ret = phy_write(phydev, MII_BMCR, BMCR_RESET); + ret = phy_set_bits(phydev, MII_BMCR, BMCR_RESET); if (ret < 0) return ret;