From patchwork Wed Jan 22 09:29:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 233395 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.7 required=3.0 tests=DATE_IN_PAST_03_06, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2AFD4C2D0DB for ; Wed, 22 Jan 2020 13:26:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EADAE2467B for ; Wed, 22 Jan 2020 13:26:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579699586; bh=Q7t6sfTX9dJl8KPxGs9eW4J5qsuJ70qm/uUg4A9JZ0c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=Gb9Miw61xlnxcVK02usx1CZyVGNdwbIL1n9NNm8ShsfgwSFacFTZunPgjhIVHGTBN Yx2UMe9Q6J5vUqiw4KsxUaTGMGOLi8m+2+VuxvteuMNKfgYVErVuGeoGyv2Ll6/yEi /1A+wFP9LRmi7zsDwjLOPiIeBlVZqYAnEZwwQQKs= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730684AbgAVN0Z (ORCPT ); Wed, 22 Jan 2020 08:26:25 -0500 Received: from mail.kernel.org ([198.145.29.99]:47050 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730845AbgAVN0V (ORCPT ); Wed, 22 Jan 2020 08:26:21 -0500 Received: from localhost (unknown [84.241.205.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7CAFE2467B; Wed, 22 Jan 2020 13:26:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579699581; bh=Q7t6sfTX9dJl8KPxGs9eW4J5qsuJ70qm/uUg4A9JZ0c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=W7C+5VVmq8iVcLc3q7LFCmMeTk7w5twnavw8wmoPkPVb6ERg+CTcklSMPEfAoNX2O cDTnMHsDp9i5R4KQ6pQ3C4A7WArHY2S5tEquyw5xDT1oP0fORW4uFjnmDJbWBKIha6 cVGReFpEiwythJ/TPIjmSZIByoYc419cMk3/uZYE= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Shengjiu Wang , Daniel Baluta , Shawn Guo Subject: [PATCH 5.4 185/222] arm64: dts: imx8mm-evk: Assigned clocks for audio plls Date: Wed, 22 Jan 2020 10:29:31 +0100 Message-Id: <20200122092846.933959096@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200122092833.339495161@linuxfoundation.org> References: <20200122092833.339495161@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: S.j. Wang commit e8b395b23643ca26e62a3081130d895e198c6154 upstream. Assign clocks and clock-rates for audio plls, that audio drivers can utilize them. Add dai-tdm-slot-num and dai-tdm-slot-width for sound-wm8524, that sai driver can generate correct bit clock. Fixes: 13f3b9fdef6c ("arm64: dts: imx8mm-evk: Enable audio codec wm8524") Signed-off-by: Shengjiu Wang Reviewed-by: Daniel Baluta Signed-off-by: Shawn Guo Signed-off-by: Greg Kroah-Hartman --- arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 2 ++ arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++++-- 2 files changed, 8 insertions(+), 2 deletions(-) --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts @@ -62,6 +62,8 @@ cpudai: simple-audio-card,cpu { sound-dai = <&sai3>; + dai-tdm-slot-num = <2>; + dai-tdm-slot-width = <32>; }; simple-audio-card,codec { --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -479,14 +479,18 @@ <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_IPG_AUDIO_ROOT>, <&clk IMX8MM_SYS_PLL3>, - <&clk IMX8MM_VIDEO_PLL1>; + <&clk IMX8MM_VIDEO_PLL1>, + <&clk IMX8MM_AUDIO_PLL1>, + <&clk IMX8MM_AUDIO_PLL2>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>, <&clk IMX8MM_SYS_PLL1_800M>; assigned-clock-rates = <0>, <400000000>, <400000000>, <750000000>, - <594000000>; + <594000000>, + <393216000>, + <361267200>; }; src: reset-controller@30390000 {