From patchwork Thu Jan 16 23:17:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 233708 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4EA0C33CB3 for ; Thu, 16 Jan 2020 23:44:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A91842072B for ; Thu, 16 Jan 2020 23:44:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579218242; bh=CS1XRDACWBXXeycLKvho87XDFgutnA8XGJnE6lEdYBg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=sjeWkVJv/2l8fyEt2XtFz/3b0uwj7COwEkAZtHe13kuKh9r7sgULeVnJMk/5YcWLU VKuWwXiqEPfZwOtDdShq/8RTS2eR3lxlHmol9Ewf5v9jVuLcPbhUo5Ds9gX8xB+0R9 Qgwow4kekO7YXDkppZJKfzW/bs/Mf1gQ7Fyh0tTI= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388076AbgAPXY2 (ORCPT ); Thu, 16 Jan 2020 18:24:28 -0500 Received: from mail.kernel.org ([198.145.29.99]:53474 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387739AbgAPXY1 (ORCPT ); Thu, 16 Jan 2020 18:24:27 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 995F820748; Thu, 16 Jan 2020 23:24:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579217067; bh=CS1XRDACWBXXeycLKvho87XDFgutnA8XGJnE6lEdYBg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=alkvLSJFM9GcM0AxUhrzG27FR4vkwY09ZSWrZkk3LAZN+qWhs64msOtUUDY2saKlW 9LrCJQBUg/Ko5sDOOOn3aEWNqiUYTEnF8S5PB7KvsTIkpz/VKjNK1QN9NI5G7XMJiS X8F3W6OaTwIIJNP5xEbzF9vzBkq3xSvZ6VfvzUc4= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Bjorn Andersson , Niklas Cassel , Lorenzo Pieralisi , Andrew Murray , Gustavo Pimentel Subject: [PATCH 5.4 134/203] PCI: dwc: Fix find_next_bit() usage Date: Fri, 17 Jan 2020 00:17:31 +0100 Message-Id: <20200116231756.802005832@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200116231745.218684830@linuxfoundation.org> References: <20200116231745.218684830@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Niklas Cassel commit 1137e61dcb99f7f8b54e77ed83f68b5b485a3e34 upstream. find_next_bit() takes a parameter of size long, and performs arithmetic that assumes that the argument is of size long. Therefore we cannot pass a u32, since this will cause find_next_bit() to read outside the stack buffer and will produce the following print: BUG: KASAN: stack-out-of-bounds in find_next_bit+0x38/0xb0 Fixes: 1b497e6493c4 ("PCI: dwc: Fix uninitialized variable in dw_handle_msi_irq()") Tested-by: Bjorn Andersson Signed-off-by: Niklas Cassel Signed-off-by: Lorenzo Pieralisi Reviewed-by: Andrew Murray Acked-by: Gustavo Pimentel Signed-off-by: Greg Kroah-Hartman --- drivers/pci/controller/dwc/pcie-designware-host.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -78,7 +78,8 @@ static struct msi_domain_info dw_pcie_ms irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) { int i, pos, irq; - u32 val, num_ctrls; + unsigned long val; + u32 status, num_ctrls; irqreturn_t ret = IRQ_NONE; num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; @@ -86,14 +87,14 @@ irqreturn_t dw_handle_msi_irq(struct pci for (i = 0; i < num_ctrls; i++) { dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_STATUS + (i * MSI_REG_CTRL_BLOCK_SIZE), - 4, &val); - if (!val) + 4, &status); + if (!status) continue; ret = IRQ_HANDLED; + val = status; pos = 0; - while ((pos = find_next_bit((unsigned long *) &val, - MAX_MSI_IRQS_PER_CTRL, + while ((pos = find_next_bit(&val, MAX_MSI_IRQS_PER_CTRL, pos)) != MAX_MSI_IRQS_PER_CTRL) { irq = irq_find_mapping(pp->irq_domain, (i * MAX_MSI_IRQS_PER_CTRL) +