From patchwork Tue Apr 3 11:09:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 132716 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp3665708ljb; Tue, 3 Apr 2018 04:09:56 -0700 (PDT) X-Google-Smtp-Source: AIpwx4/oWNlfwtUCkCfetcK3Lhxrhqq/eh/uZEeC5TPoOOA/4M6Wne0z8PIcInqSi0/3PyR5WjmW X-Received: by 10.99.60.89 with SMTP id i25mr1433925pgn.208.1522753796436; Tue, 03 Apr 2018 04:09:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522753796; cv=none; d=google.com; s=arc-20160816; b=xrIaVBMVIGr5954WkEIrXk9P6FunkzCnK3RGD4uJrhKDyW43H5H1RXdKCuBF1LrISW QXByoc0gb6whxS4ZjEKe5kmAOwF/zj2bosvwEkZSsp0Vk9B4PLzeaB/xgNCaY4m47Jny DYYZhKwQkCFjMOAfpMlEqCDc7IOzaJAUQIX8pEXO04RBVZO+5aULSATfkHzXC8vLx2DL 6b0hwFmH+gQ39L6h2mybKPB0NWaAckAf8s146K+X1qQ7CYRohjJYpqIQlYGpy/s9hOxM J9ZwWz64T5euFzJBIWzExRHpCHzd+zNXyI55NuZcKgINRCJUx5SGzDYK8UN3GR6gBg1a 4nVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=PYDlewgEzJ8qoCXR+3aNWczCjvP3Y/G8NsLLxKYG1qA=; b=E/O1M30zRiGPWG/c3M7W6BvRXCR1vjFDRvE3ouYA4YQfjUWCkVvYo3+9zYWQCEe7MO MoDbkln1c/ifkdJhiPhlGH57lQXhwlCa4SckfZGEIFE6kTG2oFcpZgBnp6al/iOmy2fV vBxvqJO9z+ejgZloIIvRilN6cVkHxit5OrmKsfRIlDKa+A1p7w+ZMwJqj7I/XK2/yUxB mJiTm5GPPLW9YCEytTebW9JmLo6zLr/y9QT8CCX/nzDDmeMAzA/NzQ4Y7tlGwil33OxX CVDVxU3xq7muG2b1OFrln3wITEZ60pu7BFpJmsLkKY4M3BbONzs9nKU3GinBtTqzzDrd tB2A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d14-v6si302866plj.191.2018.04.03.04.09.56; Tue, 03 Apr 2018 04:09:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755315AbeDCLJz (ORCPT + 11 others); Tue, 3 Apr 2018 07:09:55 -0400 Received: from foss.arm.com ([217.140.101.70]:59304 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755242AbeDCLJz (ORCPT ); Tue, 3 Apr 2018 07:09:55 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 006F11435; Tue, 3 Apr 2018 04:09:55 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C3D4D3F587; Tue, 3 Apr 2018 04:09:53 -0700 (PDT) From: Mark Rutland To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com Subject: [PATCH v4.9.y 05/27] arm64: mm: Invalidate both kernel and user ASIDs when performing TLBI Date: Tue, 3 Apr 2018 12:09:01 +0100 Message-Id: <20180403110923.43575-6-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180403110923.43575-1-mark.rutland@arm.com> References: <20180403110923.43575-1-mark.rutland@arm.com> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Will Deacon commit 9b0de864b5bc upstream. Since an mm has both a kernel and a user ASID, we need to ensure that broadcast TLB maintenance targets both address spaces so that things like CoW continue to work with the uaccess primitives in the kernel. Reviewed-by: Mark Rutland Tested-by: Laura Abbott Tested-by: Shanker Donthineni Signed-off-by: Will Deacon Signed-off-by: Alex Shi [v4.9 backport] Signed-off-by: Mark Rutland [v4.9 backport] --- arch/arm64/include/asm/tlbflush.h | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) -- 2.11.0 diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index deab52374119..ad6bd8b26ada 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -23,6 +23,7 @@ #include #include +#include /* * Raw TLBI operations. @@ -42,6 +43,11 @@ #define __tlbi(op, ...) __TLBI_N(op, ##__VA_ARGS__, 1, 0) +#define __tlbi_user(op, arg) do { \ + if (arm64_kernel_unmapped_at_el0()) \ + __tlbi(op, (arg) | USER_ASID_FLAG); \ +} while (0) + /* * TLB Management * ============== @@ -103,6 +109,7 @@ static inline void flush_tlb_mm(struct mm_struct *mm) dsb(ishst); __tlbi(aside1is, asid); + __tlbi_user(aside1is, asid); dsb(ish); } @@ -113,6 +120,7 @@ static inline void flush_tlb_page(struct vm_area_struct *vma, dsb(ishst); __tlbi(vale1is, addr); + __tlbi_user(vale1is, addr); dsb(ish); } @@ -139,10 +147,13 @@ static inline void __flush_tlb_range(struct vm_area_struct *vma, dsb(ishst); for (addr = start; addr < end; addr += 1 << (PAGE_SHIFT - 12)) { - if (last_level) + if (last_level) { __tlbi(vale1is, addr); - else + __tlbi_user(vale1is, addr); + } else { __tlbi(vae1is, addr); + __tlbi_user(vae1is, addr); + } } dsb(ish); } @@ -182,6 +193,7 @@ static inline void __flush_tlb_pgtable(struct mm_struct *mm, unsigned long addr = uaddr >> 12 | (ASID(mm) << 48); __tlbi(vae1is, addr); + __tlbi_user(vae1is, addr); dsb(ish); }