From patchwork Mon May 8 19:55:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 98846 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp1491874qge; Mon, 8 May 2017 12:55:51 -0700 (PDT) X-Received: by 10.84.216.21 with SMTP id m21mr7134347pli.116.1494273351112; Mon, 08 May 2017 12:55:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1494273351; cv=none; d=google.com; s=arc-20160816; b=1IfmbA66xU8qF3WV8pIC55xxkQL6kqF++p4m3GD4AL/nF0kys0gD8ausheMuhMUdWN vNDZNDQmNBwIkp2EhIDxLlCrTAJP5BhHvFfqWZoc3bZ1YC0gl4+pwLmwhhDkOE3jtVdZ /Gf8xkd/sfTlpeih0RdwWKj/aKG8u19oHkErgXc1ZwNMq85cCZ+yKGEphpuvtD9SF12H zIOBoBvfy2i9DPa7ZFgveF+M4L5K6GXV4VFMibb+4UhuoEV5pzNiONt8P+2zlOVFIFnW XydTMaZTXG1DdX5ds0oWspPjY3gRXHzKiQIukvbA/B0aeMPM7CYsnTBuSxOGvJ6cw93D srCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=05GC1VONKN3EWutxCc2jAQ3AvhbT/JaqFMVK98lwZqQ=; b=trxck1KTcDmq+qvEnj1ZloH7ueU4rBE8ujYBT3yjPFLA/Ux+t/SWXRsRm35xuKQBQH bUK/5tKEdNwDNYmhtRO79nXrbcK4EgmR6qAUocGlkto58Qa763ov2VY229GEQazYQTeP IdKgYBklhaNiLY1VJRfGF6vVmaYRI9ipA2SfSlzClUCtPLDeOQD8rGUinPrgfiXhZ13L oR3loam62do0260XfcUeys5+ehagLHrO9JCcVEyv2+YyNvsnq5X6syk2lWn1l3jYOM+j fuVY7koYYBsGA45zrodE3O4zgaaWVxqLcwNn1rOC/AC1phrvsB/Jje4kVUlzXNb8onJ8 rLFA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f6si10831931pgn.392.2017.05.08.12.55.50; Mon, 08 May 2017 12:55:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756703AbdEHTzu (ORCPT + 6 others); Mon, 8 May 2017 15:55:50 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:58964 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755563AbdEHTzt (ORCPT ); Mon, 8 May 2017 15:55:49 -0400 Received: from wuerfel.lan ([78.42.17.5]) by mrelayeu.kundenserver.de (mreue001 [212.227.15.129]) with ESMTPA (Nemesis) id 0LiscI-1dkiY32sJi-00dBre; Mon, 08 May 2017 21:55:45 +0200 From: Arnd Bergmann To: gregkh@linuxfoundation.org Cc: stable@vger.kernel.org, Ard Biesheuvel , Russell King , Arnd Bergmann Subject: [PATCH] [stable 3.18 through 4.4] ARM: 8452/3: PJ4: make coprocessor access sequences buildable in Thumb2 mode Date: Mon, 8 May 2017 21:55:41 +0200 Message-Id: <20170508195541.1301420-1-arnd@arndb.de> X-Mailer: git-send-email 2.9.0 X-Provags-ID: V03:K0:0LhflQUUMR5t0BFbEZJer8ikvFm4ymdD9pnntU4cofE1PwrxbNT AdfvILP3G5mCJf4/7TM+D0R7xVmRhGDOU6yBpJTk/ziT26aJM/s0JYzvhjfIevSa6NNjW5B EcmlY/umceKJEpxlzvOFUl3z4ThVn3MUZFdTDk7ywa84O14ABtDoK5nFOe1wrrtD3zyHTHA 2dN5bb9slklzYGQBJsNBA== X-UI-Out-Filterresults: notjunk:1; V01:K0:LaRMv0RPlkA=:B3BB8xtxMlyomB8Si1dcYY iqAnenLuuGaFgFVadsHwMkxc2+od9S1mFVmfPyA6GAoIpAJlXKLiiVUBWWMD+ngD6W5sT2tsl Z/6DvRjKoEPlQM0XXm1j0TuW4UOpu66Y8AQ3nJBHLbXCqkWbTbmFk1Vwi/IB+TvZszUgBGvn5 iwqcgkbupMkx1dTvzmKbFpP+XrQC/Odt8PqIEyLP7JZqZ+YUYPozm9aUdtgEC/p47a4omglFI nQTsHUnQ/xR65kWuzKyCiZTUfn5YoUh4I6B1Yb3WW3HpfF11q7+X/awxCF1o8gOxvxoBJfQiK xdm/dAzMlY+lf1zty0OdY+dxW6/vuXOLy528DsfVHqUH+cjOZcfuBacFRss27pYARyV9pGj6Z +/gUpKIE5SOXRjLcTby5PCZXxir2V6881QxPdfXp2L+w47XcAOrkpyEJ68j326PG75EER9j7q 2f7KdrmsdJdwZmsblPf/l4U/4O6/rgQNhPM8pBsLY8UDZUoKIN3uMqa1M8oVTiKI0gzZ245Gi XSAJECC7f6rvRN4/HjLgpIYQXmOVWEH+7+VU2AhNdqMqp4LXy40nbq/VqhmKOAGtgKtbLzPzT 5hdb/n1GziyOG7c2YyvYfx1QVBsUIU9JL8un7bd4Bk400n+j45yWGnA7P1oZWoamC3H8skcOz 2EQnC8uz+yGLlQlgQCWgFLUAz3Bqc46usL+rL22L0CsMrCkVEzb98cHyHDcDgqh/3ugg= Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Ard Biesheuvel Commit 5008efc83bf85b647aa1cbc44718b1675bbb7444 upstream. The PJ4 inline asm sequence to write to cp15 cannot be built in Thumb-2 mode, due to the way it performs arithmetic on the program counter, so it is built in ARM mode instead. However, building C files in ARM mode under CONFIG_THUMB2_KERNEL is problematic, since the instrumentation performed by subsystems like ftrace does not expect having to deal with interworking branches. Since the sequence in question is simply a poor man's ISB instruction, let's use a straight 'isb' instead when building in Thumb2 mode. Thumb2 implies V7, so 'isb' should always be supported in that case. Acked-by: Arnd Bergmann Acked-by: Nicolas Pitre Signed-off-by: Ard Biesheuvel Signed-off-by: Russell King Signed-off-by: Arnd Bergmann --- Hi Greg, As Ard pointed out, commit 13d1b9575ac2c2da ("ARM: 8221/1: PJ4: allow building in Thumb-2 mode") which I suggested for backports into 3.16 is broken unless we also take this one. I checked the other stable branches and found that both 3.18 and 4.4 contain only the first of the two, so please apply this one on both branches as well. 3.16 and contain neither patch at the moment, but I have added both to my local 3.16 series. --- arch/arm/kernel/Makefile | 1 - arch/arm/kernel/pj4-cp0.c | 4 ++++ 2 files changed, 4 insertions(+), 1 deletion(-) -- 2.9.0 diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 2ecc7d15bc09..03120e656aea 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -84,7 +84,6 @@ obj-$(CONFIG_CPU_PJ4B) += pj4-cp0.o obj-$(CONFIG_IWMMXT) += iwmmxt.o obj-$(CONFIG_PERF_EVENTS) += perf_regs.o obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o perf_event_cpu.o -CFLAGS_pj4-cp0.o := -marm AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c index 8153e36b2491..7c9248b74d3f 100644 --- a/arch/arm/kernel/pj4-cp0.c +++ b/arch/arm/kernel/pj4-cp0.c @@ -66,9 +66,13 @@ static void __init pj4_cp_access_write(u32 value) __asm__ __volatile__ ( "mcr p15, 0, %1, c1, c0, 2\n\t" +#ifdef CONFIG_THUMB2_KERNEL + "isb\n\t" +#else "mrc p15, 0, %0, c1, c0, 2\n\t" "mov %0, %0\n\t" "sub pc, pc, #4\n\t" +#endif : "=r" (temp) : "r" (value)); }