From patchwork Thu Dec 13 16:06:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 153696 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp973115ljp; Thu, 13 Dec 2018 08:06:01 -0800 (PST) X-Google-Smtp-Source: AFSGD/WIsvNSUAzGrpxzBTxoXXfMCdTc4f9cTGvlyVJfPEgPwNrhVtAS4m0Y0q4KEkIg20GEIwEI X-Received: by 2002:a17:902:4464:: with SMTP id k91mr24465366pld.13.1544717160907; Thu, 13 Dec 2018 08:06:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544717160; cv=none; d=google.com; s=arc-20160816; b=OCUIdnmmzvTRKYbuxz26PzxmhHBwJ5BBk5sBfd1GdePOHbi9soCpjrnEwiUs3aBqzS Z1uxouE38RzGAQbycfjv5gzIBaSuhTb5bwMp4zJ6fCzfq+I+mJ75QJjm6FcZ+APbHQlC hFXcydhoJQZppYQYqmhViNv/B0vAc70f4XRtnHhpL0WuNX/Qn72rq1yBebxlGr+/Qgpn vXCAV8QikrmJThvZv5REL5qqMiiphH6iV8b9bNs7qj9AjuQUxIM5lwvAingEM6WHyXSu darr5UW0OnGxwe5hq21cWBUBWAe99MrIpKIBUxcxjAJmtqSlltFpAxfJV4T8LFWseq+g oSFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=vfHdNoIHpyLRP6I/gwE+VxGX/BOpjxSyyUu+YnK57Z0=; b=Gtjb3JLpj2bIc3TytR2jVHxd/Mgd0nOUr4kqf5hhb5RNWdIOzI2ENCmH50CeJfzPim Vdp3IM8Agf/Vjp3leURHpanXmbZM9gm9S7P4Trop0puQcpVW4dq5RyVWkVcE8N4tdrZi B9QMNtcndqWQXo5ywT5Rj1MOYa/MjpKQW6ZGBt2ugAJx5WYtTtsrVkHYEnfnKMEeCmJo 1pj6BOOiPmZ/fCMuLJZpd54kPHVn1NeovknH20C9NLHtYuXfZVp5+mCNFgpyqgJBTqdu NqLTpCdBVdTRdIro7869JtZ15Yo7iJV4xa862jF/atIpHt/NeSbdq3NUxnatM2ks7uDt T/1Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c201si1939961pfb.211.2018.12.13.08.05.53; Thu, 13 Dec 2018 08:06:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729213AbeLMQFw (ORCPT + 15 others); Thu, 13 Dec 2018 11:05:52 -0500 Received: from foss.arm.com ([217.140.101.70]:36718 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729082AbeLMQFw (ORCPT ); Thu, 13 Dec 2018 11:05:52 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5C62880D; Thu, 13 Dec 2018 08:05:52 -0800 (PST) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2C1FA3F614; Thu, 13 Dec 2018 08:05:52 -0800 (PST) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id E53451AE0F54; Thu, 13 Dec 2018 16:06:15 +0000 (GMT) From: Will Deacon To: kvmarm@lists.cs.columbia.edu Cc: linux-arm-kernel@lists.infradead.org, Will Deacon , , Marc Zyngier , Christoffer Dall Subject: [PATCH] arm64: kvm: Avoid setting the upper 32 bits of VTCR_EL2 to 1 Date: Thu, 13 Dec 2018 16:06:14 +0000 Message-Id: <1544717174-15116-1-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org Although bit 31 of VTCR_EL2 is RES1, we inadvertently end up setting all of the upper 32 bits to 1 as well because we define VTCR_EL2_RES1 as signed, which is sign-extended when assigning to kvm->arch.vtcr. Lucky for us, the architecture currently treats these upper bits as RES0 so, whilst we've been naughty, we haven't set fire to anything yet. Cc: Cc: Marc Zyngier Cc: Christoffer Dall Signed-off-by: Will Deacon --- arch/arm64/include/asm/kvm_arm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.1.4 diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index 6f602af5263c..2dafd936d84d 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -104,7 +104,7 @@ TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK | TCR_EL2_T0SZ_MASK) /* VTCR_EL2 Registers bits */ -#define VTCR_EL2_RES1 (1 << 31) +#define VTCR_EL2_RES1 (1U << 31) #define VTCR_EL2_HD (1 << 22) #define VTCR_EL2_HA (1 << 21) #define VTCR_EL2_PS_SHIFT TCR_EL2_PS_SHIFT