From patchwork Mon Oct 15 15:32:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Long X-Patchwork-Id: 148860 Delivered-To: patches@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp3933878lji; Mon, 15 Oct 2018 08:32:32 -0700 (PDT) X-Received: by 2002:a37:1413:: with SMTP id e19-v6mr15860801qkh.295.1539617552406; Mon, 15 Oct 2018 08:32:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539617552; cv=none; d=google.com; s=arc-20160816; b=Uh7Kd34CDvBSh0D4kiOEAqFulQv1TsUBlF9QBI/SrvdXJ4V4R8PElp9GoHUhIlEyMp 7by0gUifolyCr4YIQTyPU+9KfKOP6FAE8mpA26wL8b2SBigoPvezUGECHV7q6e9uFdiU u5ETNCUw/a9zVZantTklMof69OYFtMDcwSE9rY/Sg8it59ucEoirXKhNpqb58HZYtbAA IQ7afWccP3xFNcXlH3nqZX7c/EudIxctPJHcGJrykxgMEGvPVw+h7yIPyJkVT57Pe0PL nzMFeGh5Md7ezlKA3YxD3TbKpMGZplUPrQ7z/2nDagRr3Ef09fN6V1YUy3n2wiAJugHk kv7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=kX1aRmUed2abMvyaC7oMZXimOrRg7sG0R42YkGEm2uI=; b=YlVorL6A7JbNNwHMp4HNFNyeYh9PfHOdFibG6Lcl9hjwAS8Co8/xj/LZya6wnVSFXg bhs45F855736mjHVJmZb6X7fu16vgmAUtdz8sgzZYia2YqsO/hGysOq9cm/gGoG2K67r AYtfsRh+qdNois3VyfQ7OQl7jpEn9TgfYV1NvkqOprT8UlquQNjE4krooJJi9wY4/Zd6 hjugMvhAuDPI5/QCY64OHhml48nh1zXtgTb03M3WR27i3Ny0ydwjZwaVjZwHiX762wL/ brFCEy9tGp6WRVAX8wnfyveDo38q49u0ckdKkgX7GeYGCSaD9Z5z7a9fooLpVvUmG3dp G9uQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YH0dbbgh; spf=pass (google.com: domain of dave.long@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=dave.long@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id q68-v6sor6400996qkb.47.2018.10.15.08.32.32 for (Google Transport Security); Mon, 15 Oct 2018 08:32:32 -0700 (PDT) Received-SPF: pass (google.com: domain of dave.long@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YH0dbbgh; spf=pass (google.com: domain of dave.long@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=dave.long@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kX1aRmUed2abMvyaC7oMZXimOrRg7sG0R42YkGEm2uI=; b=YH0dbbghvOwhYhLcKLIVxKkZ0F8PwoWjv8yRNlp2pzk/39N8FXGku7WIxKFrX9unJR 9ui9dsQ2nizuMg1Tqlm8Z7Q4Q+uMofwnsMXQapZjt3K6UYxtzcWvygjN4Mm4YepSF6W6 /34KP8OeTAWtoMOo1I89mh/7vRhy4OFH8xr4k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kX1aRmUed2abMvyaC7oMZXimOrRg7sG0R42YkGEm2uI=; b=Sy7vyFDY7ld1Z5XLmii3KeOj23y2oFpWAP9dUsQA0rRVQqHDGz13ucj2M9gmuMXUWI uZnXwHuf+lEsrgJH1pUgsf32p1Cac66vgP6i6H7xtoyD7sBVrptMb2Jl9NBTUYv7MOL8 Nw6jHFLBt0reUBHqNUy4egyfg2vGOl9n0uRyWy64Q0BGb9NWc70i8MwFWWjmrvNPxm+9 BtaPQhL4Vh8X9lPJr/zY3+YClzMphN7obFh5RqfiC+jnqRV4wXPxTXFPvQ3Bh0sinjvi RuxkjyytVRz0uhb+Sbct75xSZATuQxdN/Vb4gMQoPRlS74dtaJrPzKvjav9bHC+jJfsX 2RBA== X-Gm-Message-State: ABuFfoga4TQ/qrFbIWeTc2Lo1FQqytuSheW8YB42dzP6M0dx1x5UQ83F B03HcY1AcngJmsMUMWWTQWVeyXUh X-Google-Smtp-Source: ACcGV62d75RNqt9CUr/gtd7PttQX54Rq0JAKLcrRzp4VoWG79TZOZGmmmPgsuv3cB7WKKhYWWEb6OQ== X-Received: by 2002:a37:5b83:: with SMTP id p125-v6mr15562060qkb.88.1539617552013; Mon, 15 Oct 2018 08:32:32 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([72.71.243.63]) by smtp.googlemail.com with ESMTPSA id g82-v6sm10087768qkh.24.2018.10.15.08.32.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 15 Oct 2018 08:32:31 -0700 (PDT) From: David Long To: , Russell King - ARM Linux , Florian Fainelli , Tony Lindgren , Marc Zyngier , Mark Rutland Cc: Greg KH , Mark Brown Subject: [PATCH 4.14 10/24] ARM: spectre-v2: warn about incorrect context switching functions Date: Mon, 15 Oct 2018 11:32:04 -0400 Message-Id: <1539617538-22328-11-git-send-email-dave.long@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1539617538-22328-1-git-send-email-dave.long@linaro.org> References: <1539617538-22328-1-git-send-email-dave.long@linaro.org> From: Russell King Commit c44f366ea7c85e1be27d08f2f0880f4120698125 upstream. Warn at error level if the context switching function is not what we are expecting. This can happen with big.Little systems, which we currently do not support. Signed-off-by: Russell King Boot-tested-by: Tony Lindgren Reviewed-by: Tony Lindgren Acked-by: Marc Zyngier Signed-off-by: David A. Long --- arch/arm/mm/proc-v7-bugs.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) -- 2.5.0 diff --git a/arch/arm/mm/proc-v7-bugs.c b/arch/arm/mm/proc-v7-bugs.c index da25a38..5544b82 100644 --- a/arch/arm/mm/proc-v7-bugs.c +++ b/arch/arm/mm/proc-v7-bugs.c @@ -12,6 +12,8 @@ #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR DEFINE_PER_CPU(harden_branch_predictor_fn_t, harden_branch_predictor_fn); +extern void cpu_v7_iciallu_switch_mm(phys_addr_t pgd_phys, struct mm_struct *mm); +extern void cpu_v7_bpiall_switch_mm(phys_addr_t pgd_phys, struct mm_struct *mm); extern void cpu_v7_smc_switch_mm(phys_addr_t pgd_phys, struct mm_struct *mm); extern void cpu_v7_hvc_switch_mm(phys_addr_t pgd_phys, struct mm_struct *mm); @@ -50,6 +52,8 @@ static void cpu_v7_spectre_init(void) case ARM_CPU_PART_CORTEX_A17: case ARM_CPU_PART_CORTEX_A73: case ARM_CPU_PART_CORTEX_A75: + if (processor.switch_mm != cpu_v7_bpiall_switch_mm) + goto bl_error; per_cpu(harden_branch_predictor_fn, cpu) = harden_branch_predictor_bpiall; spectre_v2_method = "BPIALL"; @@ -57,6 +61,8 @@ static void cpu_v7_spectre_init(void) case ARM_CPU_PART_CORTEX_A15: case ARM_CPU_PART_BRAHMA_B15: + if (processor.switch_mm != cpu_v7_iciallu_switch_mm) + goto bl_error; per_cpu(harden_branch_predictor_fn, cpu) = harden_branch_predictor_iciallu; spectre_v2_method = "ICIALLU"; @@ -82,6 +88,8 @@ static void cpu_v7_spectre_init(void) ARM_SMCCC_ARCH_WORKAROUND_1, &res); if ((int)res.a0 != 0) break; + if (processor.switch_mm != cpu_v7_hvc_switch_mm && cpu) + goto bl_error; per_cpu(harden_branch_predictor_fn, cpu) = call_hvc_arch_workaround_1; processor.switch_mm = cpu_v7_hvc_switch_mm; @@ -93,6 +101,8 @@ static void cpu_v7_spectre_init(void) ARM_SMCCC_ARCH_WORKAROUND_1, &res); if ((int)res.a0 != 0) break; + if (processor.switch_mm != cpu_v7_smc_switch_mm && cpu) + goto bl_error; per_cpu(harden_branch_predictor_fn, cpu) = call_smc_arch_workaround_1; processor.switch_mm = cpu_v7_smc_switch_mm; @@ -109,6 +119,11 @@ static void cpu_v7_spectre_init(void) if (spectre_v2_method) pr_info("CPU%u: Spectre v2: using %s workaround\n", smp_processor_id(), spectre_v2_method); + return; + +bl_error: + pr_err("CPU%u: Spectre v2: incorrect context switching function, system vulnerable\n", + cpu); } #else static void cpu_v7_spectre_init(void)