From patchwork Thu Apr 6 12:48:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Pundir X-Patchwork-Id: 96949 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp714121qgd; Thu, 6 Apr 2017 05:49:13 -0700 (PDT) X-Received: by 10.84.177.36 with SMTP id w33mr43297291plb.105.1491482953059; Thu, 06 Apr 2017 05:49:13 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 124si1800045pgg.14.2017.04.06.05.49.12; Thu, 06 Apr 2017 05:49:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752846AbdDFMtM (ORCPT + 6 others); Thu, 6 Apr 2017 08:49:12 -0400 Received: from mail-pg0-f49.google.com ([74.125.83.49]:32851 "EHLO mail-pg0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756471AbdDFMtL (ORCPT ); Thu, 6 Apr 2017 08:49:11 -0400 Received: by mail-pg0-f49.google.com with SMTP id x125so35557477pgb.0 for ; Thu, 06 Apr 2017 05:49:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4rJBob+GPYFpJvmGHphbfLug5L8LzlwWwaFBFgk5NRI=; b=eFT631Z3vhkNm6NcSlb7GTp//lcfuN41Fd2kjm1331Y2W8nCJWtZJeD3bojWN7jx+d d94zDWFA6r43URLLgUixakXPDLpJ8vulTFof+nBeXfJ9iVCgM48BeQgWfTtmmxPBY2fr zCKAN5YV4p+20/Af8uWt7Jqv130IFnR2aIjZQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4rJBob+GPYFpJvmGHphbfLug5L8LzlwWwaFBFgk5NRI=; b=YWmausAJ3xGI10oEkxNsqtxDGDPlBRx8UJg9fF8XFuYsJr8njmE1NeCooDY+yrchPi MFTiXrPFgnS7GtVEpwApjEPkXR9OC2U4vM+i3Ps06D3OEd63gWJgX1YYAK1oaGDCHANa uaC330kIcHnBf7FA8u3+/tO9GDAG+4xY8pCQs9lMqyGpzmr19nMZV21uCpv0YmCJuc4Q Cx6rF3bdtOKIxjIO5/y7IxCoLx2QeWCo1MveQuDFoqZQjFc4ollyHavaXW37ucR9luK1 f40eqHTWmv7tAqQ7+opomnF88SFBHQ/aFFrat+qJ/kVTI72WZ1P2fuD3LXsV3wzUlRfT r2Zw== X-Gm-Message-State: AFeK/H1HLBeevyZamsq7lgzfbt3/sBCsJRBoHx5HMnfd56S9WKWK2xhm+hjwwS3R0UWZE305 X-Received: by 10.98.102.88 with SMTP id a85mr36390080pfc.33.1491482950163; Thu, 06 Apr 2017 05:49:10 -0700 (PDT) Received: from localhost.localdomain ([106.51.240.246]) by smtp.gmail.com with ESMTPSA id n7sm3892564pfn.0.2017.04.06.05.49.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 06 Apr 2017 05:49:09 -0700 (PDT) From: Amit Pundir To: gregkh@linuxfoundation.org Cc: stable@vger.kernel.org, james.hogan@imgtec.com, Matt Redfearn , Thomas Gleixner , Paolo Bonzini , Chris Metcalf , Petr Mladek , Paul Burton , Aaron Tomlin , Andrew Morton , linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Ralf Baechle Subject: [PATCH for-4.4 1/7] MIPS: Introduce irq_stack Date: Thu, 6 Apr 2017 18:18:54 +0530 Message-Id: <1491482940-1163-2-git-send-email-amit.pundir@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491482940-1163-1-git-send-email-amit.pundir@linaro.org> References: <1491482940-1163-1-git-send-email-amit.pundir@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Matt Redfearn Allocate a per-cpu irq stack for use within interrupt handlers. Also add a utility function on_irq_stack to determine if a given stack pointer is within the irq stack for that cpu. Signed-off-by: Matt Redfearn Acked-by: Jason A. Donenfeld Cc: Thomas Gleixner Cc: Paolo Bonzini Cc: Chris Metcalf Cc: Petr Mladek Cc: James Hogan Cc: Paul Burton Cc: Aaron Tomlin Cc: Andrew Morton Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14740/ Signed-off-by: Ralf Baechle (cherry picked from commit fe8bd18ffea5327344d4ec2bf11f47951212abd0) Signed-off-by: Amit Pundir --- arch/mips/include/asm/irq.h | 12 ++++++++++++ arch/mips/kernel/asm-offsets.c | 1 + arch/mips/kernel/irq.c | 11 +++++++++++ 3 files changed, 24 insertions(+) -- 2.7.4 diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h index 15e0fec..ebb9efb 100644 --- a/arch/mips/include/asm/irq.h +++ b/arch/mips/include/asm/irq.h @@ -17,6 +17,18 @@ #include +#define IRQ_STACK_SIZE THREAD_SIZE + +extern void *irq_stack[NR_CPUS]; + +static inline bool on_irq_stack(int cpu, unsigned long sp) +{ + unsigned long low = (unsigned long)irq_stack[cpu]; + unsigned long high = low + IRQ_STACK_SIZE; + + return (low <= sp && sp <= high); +} + #ifdef CONFIG_I8259 static inline int irq_canonicalize(int irq) { diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index 154e203..ec053ce 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c @@ -101,6 +101,7 @@ void output_thread_info_defines(void) OFFSET(TI_REGS, thread_info, regs); DEFINE(_THREAD_SIZE, THREAD_SIZE); DEFINE(_THREAD_MASK, THREAD_MASK); + DEFINE(_IRQ_STACK_SIZE, IRQ_STACK_SIZE); BLANK(); } diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 8eb5af8..dc1180a 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c @@ -25,6 +25,8 @@ #include #include +void *irq_stack[NR_CPUS]; + /* * 'what should we do if we get a hw irq event on an illegal vector'. * each architecture has to answer this themselves. @@ -55,6 +57,15 @@ void __init init_IRQ(void) irq_set_noprobe(i); arch_init_irq(); + + for_each_possible_cpu(i) { + int irq_pages = IRQ_STACK_SIZE / PAGE_SIZE; + void *s = (void *)__get_free_pages(GFP_KERNEL, irq_pages); + + irq_stack[i] = s; + pr_debug("CPU%d IRQ stack at 0x%p - 0x%p\n", i, + irq_stack[i], irq_stack[i] + IRQ_STACK_SIZE); + } } #ifdef CONFIG_DEBUG_STACKOVERFLOW