From patchwork Sat Mar 25 16:18:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Semwal X-Patchwork-Id: 95987 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp532178qgd; Sat, 25 Mar 2017 09:19:26 -0700 (PDT) X-Received: by 10.98.160.84 with SMTP id r81mr16228378pfe.71.1490458766896; Sat, 25 Mar 2017 09:19:26 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r3si6723034pli.62.2017.03.25.09.19.26; Sat, 25 Mar 2017 09:19:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751350AbdCYQT0 (ORCPT + 5 others); Sat, 25 Mar 2017 12:19:26 -0400 Received: from mail-pg0-f50.google.com ([74.125.83.50]:36108 "EHLO mail-pg0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751309AbdCYQT0 (ORCPT ); Sat, 25 Mar 2017 12:19:26 -0400 Received: by mail-pg0-f50.google.com with SMTP id g2so9136064pge.3 for ; Sat, 25 Mar 2017 09:19:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=phNXz8ra/bu9p7BVAO8iJTRFr/rtrqkH/boy78OBUuw=; b=heyrAUZz2Zh2s8vFjsXcop0xs9HLd1NWRRe9LCUYG7bx3qjfcbBoiZ8Oit128mAvLP T5EP4nOpwzCNo6AnTzqiqicXcUYeWhesk/XnHJVgZ39gUGA8MM/x0YXsc/GGBngAmYY9 +bRrKpa+Ve7ZjMoEC4gSa1yX29nJp1Zc7+Mh4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=phNXz8ra/bu9p7BVAO8iJTRFr/rtrqkH/boy78OBUuw=; b=UzaNvdSAxTGmfjBV+ShVEjNN9MU16g7cko5jkBngzm9chYCZZKCMb/Ysn59Uoxy1HE 3MjNCQr+HdYmEdxAbs0Aly8K8ydor9WlVQZ39dra7a52CaD6J1DUTyA7TBtoQU0SnjJl yQarNxro+UHF2hjLA/A6nfcmdm5W1UyYgfWlVDLFJwCg8nQyS8/mTwwWJv12qRbhXL3i StnX9V35KGNyhDVsGd7EXHfJO3vfqkpUpz28kv2e0srr5gO4ETUi0RurnRXasGjaJiQk uZpKZXCxxEG8HOLhWSBqZBOCl4deGR5mWhh3yH7A7sY3gvPWn79ZRIqbAn6HlF4rPhSm U0SQ== X-Gm-Message-State: AFeK/H1KfnQhuwKO2pKMIIxVx88ZKx9mqKkIQLVVmdQ8aphJrGQYXdTcXFx+ep109DjLF8u/ X-Received: by 10.98.19.156 with SMTP id 28mr15702257pft.208.1490458764807; Sat, 25 Mar 2017 09:19:24 -0700 (PDT) Received: from phantom.lan ([106.51.225.38]) by smtp.gmail.com with ESMTPSA id q194sm11469541pfq.43.2017.03.25.09.19.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 25 Mar 2017 09:19:23 -0700 (PDT) From: Sumit Semwal To: stable@vger.kernel.org Cc: Bjorn Helgaas , Sasha Levin , Greg Kroah-Hartman , Sumit Semwal Subject: [PATCH for-4.4 10/19] PCI: Update BARs using property bits appropriate for type Date: Sat, 25 Mar 2017 21:48:10 +0530 Message-Id: <1490458699-24484-11-git-send-email-sumit.semwal@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490458699-24484-1-git-send-email-sumit.semwal@linaro.org> References: <1490458699-24484-1-git-send-email-sumit.semwal@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Bjorn Helgaas [ Upstream commit 45d004f4afefdd8d79916ee6d97a9ecd94bb1ffe ] The BAR property bits (0-3 for memory BARs, 0-1 for I/O BARs) are supposed to be read-only, but we do save them in res->flags and include them when updating the BAR. Mask the I/O property bits with ~PCI_BASE_ADDRESS_IO_MASK (0x3) instead of PCI_REGION_FLAG_MASK (0xf) to make it obvious that we can't corrupt bits 2-3 of I/O addresses. Use PCI_ROM_ADDRESS_MASK for ROM BARs. This means we'll only check the top 21 bits (instead of the 28 bits we used to check) of a ROM BAR to see if the update was successful. Signed-off-by: Bjorn Helgaas Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman Signed-off-by: Sumit Semwal --- drivers/pci/setup-res.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) -- 2.7.4 diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index d1ba5e0..032a6b1 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -58,12 +58,17 @@ static void pci_std_update_resource(struct pci_dev *dev, int resno) return; pcibios_resource_to_bus(dev->bus, ®ion, res); + new = region.start; - new = region.start | (res->flags & PCI_REGION_FLAG_MASK); - if (res->flags & IORESOURCE_IO) + if (res->flags & IORESOURCE_IO) { mask = (u32)PCI_BASE_ADDRESS_IO_MASK; - else + new |= res->flags & ~PCI_BASE_ADDRESS_IO_MASK; + } else if (resno == PCI_ROM_RESOURCE) { + mask = (u32)PCI_ROM_ADDRESS_MASK; + } else { mask = (u32)PCI_BASE_ADDRESS_MEM_MASK; + new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK; + } if (resno < PCI_ROM_RESOURCE) { reg = PCI_BASE_ADDRESS_0 + 4 * resno;