From patchwork Fri Oct 7 08:52:17 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 77320 Delivered-To: patch@linaro.org Received: by 10.140.97.247 with SMTP id m110csp237227qge; Fri, 7 Oct 2016 01:53:49 -0700 (PDT) X-Received: by 10.98.200.2 with SMTP id z2mr34445398pff.48.1475830429263; Fri, 07 Oct 2016 01:53:49 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o1si16322341pai.332.2016.10.07.01.53.49; Fri, 07 Oct 2016 01:53:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753324AbcJGIxr (ORCPT + 3 others); Fri, 7 Oct 2016 04:53:47 -0400 Received: from mail-lf0-f52.google.com ([209.85.215.52]:35014 "EHLO mail-lf0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756400AbcJGIxk (ORCPT ); Fri, 7 Oct 2016 04:53:40 -0400 Received: by mail-lf0-f52.google.com with SMTP id l131so35761296lfl.2 for ; Fri, 07 Oct 2016 01:52:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=fEAKYVHqZG+NPZWfWhS6o+YWZxaWOBF+3APKr2sEs74=; b=RpybDOu0uzh6m9KgAyqwFsVPBTHD9OAWnEVksVn/LTtcvXXIPq7NFvJ3U9+Y+x0cZs NvIuADkTcQTRi2GDBzsXzm602eTw7leMtPS8Rf8qrB8DYg75Gmz0HtCcPbUP4jP/MHlw u1RisJRxKUEp+iFm64vfFs8Vgs6jO7ZhyeXjQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=fEAKYVHqZG+NPZWfWhS6o+YWZxaWOBF+3APKr2sEs74=; b=VzX9Pi6noh/8IJzwRB+HYqd1pFq9ph5vMJJeCys4DT71z4XTCLAnt+5G3x9QW5xR5v ndI0M2bPhLgfoDSh0x9U1OAiBeYbHQPgY/kXYwDgE6oAHKeQ83tzbTzK8JRiwnOGG7BJ YHFcGTYEl9IeNYBxsVWMwU1PjlPHVaOQWGqydAYmQZYt54rBhaPtSGc9oQpnC0LUF2GF vTcdNeYytrYHfnn+IIYbuoyvTZ/KsEixIcjFeychW0MyI0ORt9seelSJXmUAIH+swAH0 wL9XeQD0EVOMth4H4KQORwtx+onh9DUvGtwmUsEJLvhXRd+pcqDugt+e6FE5dHO1Asz9 wGuA== X-Gm-Message-State: AA6/9RkSVQHYJQssijbeSptwA0rvzMApTPF9z3U2etXOU29BACMKjDO+QxQO1u1WwoZ4xl5e X-Received: by 10.46.33.211 with SMTP id h80mr8162764lji.58.1475830348236; Fri, 07 Oct 2016 01:52:28 -0700 (PDT) Received: from linuslaptop.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id g201sm3435132lfg.8.2016.10.07.01.52.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Oct 2016 01:52:27 -0700 (PDT) From: Linus Walleij To: arm@kernel.org Cc: linux-arm-kernel@lists.infradead.org, daniel.lezcano@linaro.org, Linus Walleij , stable@vger.kernel.org, Ulf Hansson Subject: [PATCH] ARM: dts: fix the SD card on the Snowball Date: Fri, 7 Oct 2016 10:52:17 +0200 Message-Id: <1475830337-13016-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org This fixes a very annoying regression on the Snowball SD card that has been around for a while. It turns out that the device tree does not configure the direction pins properly, nor sets up the pins for the voltage converter properly at boot. Unless all things are correctly set up, the feedback clock will not work, and makes the driver spew messages in the console (but it works, very slowly): root@Ux500:/ mount /dev/mmcblk0p2 /mnt/ [ 9.953460] mmci-pl18x 80126000.sdi0_per1: error during DMA transfer! [ 9.960296] mmcblk0: error -110 sending status command, retrying [ 9.966461] mmcblk0: error -110 sending status command, retrying [ 9.972534] mmcblk0: error -110 sending status command, aborting Fix this by rectifying the device tree to correspond to that of the Ux500 HREF boards plus the DAT31DIR setting that is unique for the Snowball, and things start working smoothly. Add in the SDR12 and SDR25 modes which this host can do without any problems. I don't know if this has ever been correct, sadly. It works after this patch. Cc: stable@vger.kernel.org Reported-by: Daniel Lezcano Cc: Ulf Hansson Signed-off-by: Linus Walleij --- ARM SoC folks: please apply this directly for fixes. --- arch/arm/boot/dts/ste-snowball.dts | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe stable" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts index b3df1c60d465..386eee6de232 100644 --- a/arch/arm/boot/dts/ste-snowball.dts +++ b/arch/arm/boot/dts/ste-snowball.dts @@ -239,14 +239,25 @@ arm,primecell-periphid = <0x10480180>; max-frequency = <100000000>; bus-width = <4>; + cap-sd-highspeed; cap-mmc-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + /* All direction control is used */ + st,sig-dir-cmd; + st,sig-dir-dat0; + st,sig-dir-dat2; + st,sig-dir-dat31; + st,sig-pin-fbclk; + full-pwr-cycle; vmmc-supply = <&ab8500_ldo_aux3_reg>; vqmmc-supply = <&vmmci>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdi0_default_mode>; pinctrl-1 = <&sdi0_sleep_mode>; - cd-gpios = <&gpio6 26 GPIO_ACTIVE_LOW>; // 218 + /* GPIO218 MMC_CD */ + cd-gpios = <&gpio6 26 GPIO_ACTIVE_LOW>; status = "okay"; }; @@ -549,7 +560,7 @@ /* VMMCI level-shifter enable */ snowball_cfg3 { pins = "GPIO217_AH12"; - ste,config = <&gpio_out_lo>; + ste,config = <&gpio_out_hi>; }; /* VMMCI level-shifter voltage select */ snowball_cfg4 {