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[209.132.180.67]) by mx.google.com with ESMTP id 68si71605500pfk.194.2016.01.05.00.59.44; Tue, 05 Jan 2016 00:59:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751371AbcAEI7m (ORCPT + 2 others); Tue, 5 Jan 2016 03:59:42 -0500 Received: from mail-lf0-f43.google.com ([209.85.215.43]:35068 "EHLO mail-lf0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750904AbcAEI7l (ORCPT ); Tue, 5 Jan 2016 03:59:41 -0500 Received: by mail-lf0-f43.google.com with SMTP id c192so113855811lfe.2 for ; Tue, 05 Jan 2016 00:59:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=CSAH/rYVxW72vliqn5mQIduAaHemrPJ85Euag4EMIYE=; b=XooP0p7X/nIt01T9LMDkT+Yx+ULPqIwvCL/aO4UyIfdplwRtHGASHFVB1QvJXafdQh csPHWg3FmhADuBTQZlwTdyk+u/hM09MYPo5ctHhBc6AMoFeDTUbfFnDUEfOcHvqGV3sG aavbWJ2QIYpNiOP6ENgJP9JYRIUxKj1oVeF6c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=CSAH/rYVxW72vliqn5mQIduAaHemrPJ85Euag4EMIYE=; b=iFXPA5yJUXNlz3/WDgv2VGT9kgIvahaYo/0gJxPuL/Ai6WWEtrQch3I5QVBo9GmA6j vs0Ah2dBTOLLR4z7kcNpMJUbo4KDxZGGHzuvEYsmzwHK42cEnuo9VRINoo2dXWIFR+D6 mT5jvFSimAQCTJ0g+QOeKsoSXw+KT74Y7mZwGhUNHAcmSOO2j+0qNfvdIe8DiqzLAsey ZhaEdf8Pw4K0T1XoW4waC9/Hh29ywV1G4cfbW2LHyRLT+pl6hMpe3eMZTsSCdl0Yi00l 29qRL97jYf1Dc08ksOe9DbQraMon8SP0WBa73+42I29J+t3X89GWPxXLsJLEz6DaU3+q 8tXw== X-Gm-Message-State: ALoCoQlrUdw93fm/EM3urxFwq++Ms5ynGW69yke36xsUSVaQn8LuiVkHLI/eke93id3SFTBArKNVjgP08IxWjTHPRdovzdTSog== X-Received: by 10.25.19.151 with SMTP id 23mr34094763lft.40.1451984379772; Tue, 05 Jan 2016 00:59:39 -0800 (PST) Received: from localhost.localdomain ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id zm10sm16342870lbb.49.2016.01.05.00.59.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 05 Jan 2016 00:59:39 -0800 (PST) From: Linus Walleij To: arm@kernel.org Cc: linux-arm-kernel@lists.infradead.org, Linus Walleij , Rob Herring , Grant Likely , stable@vger.kernel.org Subject: [PATCH 2/2] ARM: versatile: fix MMC/SD interrupt assignment Date: Tue, 5 Jan 2016 09:59:30 +0100 Message-Id: <1451984370-16932-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.4.3 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org Commit 0976c946a610d06e907335b7a3afa6db046f8e1b "arm/versatile: Fix versatile irq specifications" has an off-by-one error on the Versatile AB that has been regressing the Versatile AB hardware for some time. However it seems like the interrupt assignments have never been correct and I have now adjusted them according to the specification. The masks for the valid interrupts made it impossible to assign the right SIC interrupt for the MMCI, so I went in and fixed these to correspond to the specifications, and added references if anyone wants to double-check. Due to the Versatile PB including the Versatile AB as a base DTS file, we need to override and correct some values to correspond to the actual changes in the hardware. For the Versatile PB I don't think the IRQ line assignment for MMCI has ever been correct for either of the two MMCI blocks. It would be nice if someone with the physical PB board could test this. Patch tested on the Versatile AB, QEMU for Versatile AB and QEMU for Versatile PB. Cc: Rob Herring Cc: Grant Likely Cc: stable@vger.kernel.org Fixes: 0976c946a610 ("arm/versatile: Fix versatile irq specifications") Signed-off-by: Linus Walleij --- ARM SoC people: please apply this directly for fixes if you find it OK. --- arch/arm/boot/dts/versatile-ab.dts | 10 +++++++--- arch/arm/boot/dts/versatile-pb.dts | 20 +++++++++++++++++++- 2 files changed, 26 insertions(+), 4 deletions(-) -- 2.4.3 -- To unsubscribe from this list: send the line "unsubscribe stable" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Rob Herring diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts index 01f40197ea13..3279bf1a17a1 100644 --- a/arch/arm/boot/dts/versatile-ab.dts +++ b/arch/arm/boot/dts/versatile-ab.dts @@ -110,7 +110,11 @@ interrupt-parent = <&vic>; interrupts = <31>; /* Cascaded to vic */ clear-mask = <0xffffffff>; - valid-mask = <0xffc203f8>; + /* + * Valid interrupt lines mask according to + * table 4-36 page 4-50 of ARM DUI 0225D + */ + valid-mask = <0x0760031b>; }; dma@10130000 { @@ -266,8 +270,8 @@ }; mmc@5000 { compatible = "arm,pl180", "arm,primecell"; - reg = < 0x5000 0x1000>; - interrupts-extended = <&vic 22 &sic 2>; + reg = <0x5000 0x1000>; + interrupts-extended = <&vic 22 &sic 1>; clocks = <&xtal24mhz>, <&pclk>; clock-names = "mclk", "apb_pclk"; }; diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts index b83137f66034..33a8eb28374e 100644 --- a/arch/arm/boot/dts/versatile-pb.dts +++ b/arch/arm/boot/dts/versatile-pb.dts @@ -5,6 +5,16 @@ compatible = "arm,versatile-pb"; amba { + /* The Versatile PB is using more SIC IRQ lines than the AB */ + sic: intc@10003000 { + clear-mask = <0xffffffff>; + /* + * Valid interrupt lines mask according to + * figure 3-30 page 3-74 of ARM DUI 0224B + */ + valid-mask = <0x7fe003ff>; + }; + gpio2: gpio@101e6000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x101e6000 0x1000>; @@ -67,6 +77,13 @@ }; fpga { + mmc@5000 { + /* + * Overrides the interrupt assignment from + * the Versatile AB board file. + */ + interrupts-extended = <&sic 22 &sic 23>; + }; uart@9000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x9000 0x1000>; @@ -86,7 +103,8 @@ mmc@b000 { compatible = "arm,pl180", "arm,primecell"; reg = <0xb000 0x1000>; - interrupts-extended = <&vic 23 &sic 2>; + interrupt-parent = <&sic>; + interrupts = <1>, <2>; clocks = <&xtal24mhz>, <&pclk>; clock-names = "mclk", "apb_pclk"; };