From patchwork Tue Jun 10 13:20:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Riku Voipio X-Patchwork-Id: 31660 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-yk0-f199.google.com (mail-yk0-f199.google.com [209.85.160.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id CB5A52054B for ; Tue, 10 Jun 2014 14:03:00 +0000 (UTC) Received: by mail-yk0-f199.google.com with SMTP id q200sf439742ykb.10 for ; Tue, 10 Jun 2014 07:03:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:date :message-id:in-reply-to:references:cc:subject:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:list-subscribe :errors-to:sender:x-original-sender :x-original-authentication-results:mailing-list; bh=dxElpF4tonj3LouW5UKsk/K5F8VOtIl0PsmMAY8DNkM=; b=DUt+3nYJXD0a7b7FUZdlL3iX5f9OJwKoM21eQvt8DhBFHmVqMn/7k7n7sBWTePlyAr 1xn1hsz0Xiu26BcRT3CP/AZGb7POifDOB1VPAo3+61XMr2WBodk8OoYmy+0Cs0YeUcMl hhH+SIimBuQ9fScnYPAtF7eumMBDbj6EOl/8wTHL8AVGWaEopu7S6iBx+5ZWzidBpDUH 3YvBEO5p5hSVN5YhcuG5X5vNy7ZXn0Z/AD0lVCOkoZxYaJyxw8yh9U1lZMJvurg34Dw9 LKxnaaD62Ep7nZlqhj/a9/pg4yQ4IbNhMLSTbAtNo33SLEkLHAjcNXyZQzuE2j4UeLYW rpEg== X-Gm-Message-State: ALoCoQkY8tGfW8PYR9ZCyIDyifUfbzy40WD8ZvTjNnRN6OIFnf7QlkVOE7UpsbYgtp2rXJdEIvGX X-Received: by 10.58.160.72 with SMTP id xi8mr400848veb.15.1402408980483; Tue, 10 Jun 2014 07:03:00 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.32.203 with SMTP id h69ls2242099qgh.56.gmail; Tue, 10 Jun 2014 07:03:00 -0700 (PDT) X-Received: by 10.221.69.68 with SMTP id yb4mr2315919vcb.49.1402408980225; Tue, 10 Jun 2014 07:03:00 -0700 (PDT) Received: from mail-ve0-f170.google.com (mail-ve0-f170.google.com [209.85.128.170]) by mx.google.com with ESMTPS id uk3si13118224vec.102.2014.06.10.07.03.00 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 10 Jun 2014 07:03:00 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.170 as permitted sender) client-ip=209.85.128.170; Received: by mail-ve0-f170.google.com with SMTP id oz11so3543109veb.15 for ; Tue, 10 Jun 2014 07:03:00 -0700 (PDT) X-Received: by 10.58.186.207 with SMTP id fm15mr33542612vec.4.1402408980081; Tue, 10 Jun 2014 07:03:00 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.54.6 with SMTP id vs6csp227803vcb; Tue, 10 Jun 2014 07:02:59 -0700 (PDT) X-Received: by 10.224.161.138 with SMTP id r10mr43847957qax.2.1402408979498; Tue, 10 Jun 2014 07:02:59 -0700 (PDT) Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id k91si26922632qgd.65.2014.06.10.07.02.59 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 10 Jun 2014 07:02:59 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:39774 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WuM3P-00081L-QH for patch@linaro.org; Tue, 10 Jun 2014 09:25:31 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53735) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WuLyz-0000Lb-FB for qemu-devel@nongnu.org; Tue, 10 Jun 2014 09:21:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WuLyp-0007aQ-OA for qemu-devel@nongnu.org; Tue, 10 Jun 2014 09:20:57 -0400 Received: from afflict.kos.to ([92.243.29.197]:41087) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WuLyp-0007ZZ-Ct for qemu-devel@nongnu.org; Tue, 10 Jun 2014 09:20:47 -0400 Received: from afflict.kos.to (afflict [92.243.29.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by afflict.kos.to (Postfix) with ESMTPSA id 78DF126560; Tue, 10 Jun 2014 15:20:45 +0200 (CEST) From: riku.voipio@linaro.org To: qemu-devel@nongnu.org Date: Tue, 10 Jun 2014 16:20:39 +0300 Message-Id: X-Mailer: git-send-email 1.7.10.4 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 92.243.29.197 Cc: Riku Voipio , Alexander Graf Subject: [Qemu-devel] [PATCH v3 10/13] signal/ppc/{save, restore}_user_regs remove __put/get error checks X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: riku.voipio@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.170 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Riku Voipio As __get_user and __put_user do not return errors, remove the if checks from around them. This allows making the save/restore functions void. Signed-off-by: Riku Voipio Reviewed-by: Peter Maydell Cc: Alexander Graf --- linux-user/signal.c | 126 +++++++++++++++++----------------------------------- 1 file changed, 41 insertions(+), 85 deletions(-) diff --git a/linux-user/signal.c b/linux-user/signal.c index bc47599..a486bbe 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -4486,7 +4486,7 @@ static target_ulong get_sigframe(struct target_sigaction *ka, return newsp; } -static int save_user_regs(CPUPPCState *env, struct target_mcontext *frame, +static void save_user_regs(CPUPPCState *env, struct target_mcontext *frame, int sigret) { target_ulong msr = env->msr; @@ -4499,21 +4499,17 @@ static int save_user_regs(CPUPPCState *env, struct target_mcontext *frame, /* Save general registers. */ for (i = 0; i < ARRAY_SIZE(env->gpr); i++) { - if (__put_user(env->gpr[i], &frame->mc_gregs[i])) { - return 1; - } + __put_user(env->gpr[i], &frame->mc_gregs[i]); } - if (__put_user(env->nip, &frame->mc_gregs[TARGET_PT_NIP]) - || __put_user(env->ctr, &frame->mc_gregs[TARGET_PT_CTR]) - || __put_user(env->lr, &frame->mc_gregs[TARGET_PT_LNK]) - || __put_user(env->xer, &frame->mc_gregs[TARGET_PT_XER])) - return 1; + __put_user(env->nip, &frame->mc_gregs[TARGET_PT_NIP]); + __put_user(env->ctr, &frame->mc_gregs[TARGET_PT_CTR]); + __put_user(env->lr, &frame->mc_gregs[TARGET_PT_LNK]); + __put_user(env->xer, &frame->mc_gregs[TARGET_PT_XER]); for (i = 0; i < ARRAY_SIZE(env->crf); i++) { ccr |= env->crf[i] << (32 - ((i + 1) * 4)); } - if (__put_user(ccr, &frame->mc_gregs[TARGET_PT_CCR])) - return 1; + __put_user(ccr, &frame->mc_gregs[TARGET_PT_CCR]); /* Save Altivec registers if necessary. */ if (env->insns_flags & PPC_ALTIVEC) { @@ -4521,69 +4517,53 @@ static int save_user_regs(CPUPPCState *env, struct target_mcontext *frame, ppc_avr_t *avr = &env->avr[i]; ppc_avr_t *vreg = &frame->mc_vregs.altivec[i]; - if (__put_user(avr->u64[0], &vreg->u64[0]) || - __put_user(avr->u64[1], &vreg->u64[1])) { - return 1; - } + __put_user(avr->u64[0], &vreg->u64[0]); + __put_user(avr->u64[1], &vreg->u64[1]); } /* Set MSR_VR in the saved MSR value to indicate that frame->mc_vregs contains valid data. */ msr |= MSR_VR; - if (__put_user((uint32_t)env->spr[SPR_VRSAVE], - &frame->mc_vregs.altivec[32].u32[3])) - return 1; + __put_user((uint32_t)env->spr[SPR_VRSAVE], + &frame->mc_vregs.altivec[32].u32[3]); } /* Save floating point registers. */ if (env->insns_flags & PPC_FLOAT) { for (i = 0; i < ARRAY_SIZE(env->fpr); i++) { - if (__put_user(env->fpr[i], &frame->mc_fregs[i])) { - return 1; - } + __put_user(env->fpr[i], &frame->mc_fregs[i]); } - if (__put_user((uint64_t) env->fpscr, &frame->mc_fregs[32])) - return 1; + __put_user((uint64_t) env->fpscr, &frame->mc_fregs[32]); } /* Save SPE registers. The kernel only saves the high half. */ if (env->insns_flags & PPC_SPE) { #if defined(TARGET_PPC64) for (i = 0; i < ARRAY_SIZE(env->gpr); i++) { - if (__put_user(env->gpr[i] >> 32, &frame->mc_vregs.spe[i])) { - return 1; - } + __put_user(env->gpr[i] >> 32, &frame->mc_vregs.spe[i]); } #else for (i = 0; i < ARRAY_SIZE(env->gprh); i++) { - if (__put_user(env->gprh[i], &frame->mc_vregs.spe[i])) { - return 1; - } + __put_user(env->gprh[i], &frame->mc_vregs.spe[i]); } #endif /* Set MSR_SPE in the saved MSR value to indicate that frame->mc_vregs contains valid data. */ msr |= MSR_SPE; - if (__put_user(env->spe_fscr, &frame->mc_vregs.spe[32])) - return 1; + __put_user(env->spe_fscr, &frame->mc_vregs.spe[32]); } /* Store MSR. */ - if (__put_user(msr, &frame->mc_gregs[TARGET_PT_MSR])) - return 1; + __put_user(msr, &frame->mc_gregs[TARGET_PT_MSR]); /* Set up the sigreturn trampoline: li r0,sigret; sc. */ if (sigret) { - if (__put_user(0x38000000UL | sigret, &frame->tramp[0]) || - __put_user(0x44000002UL, &frame->tramp[1])) { - return 1; - } + __put_user(0x38000000UL | sigret, &frame->tramp[0]); + __put_user(0x44000002UL, &frame->tramp[1]); } - - return 0; } -static int restore_user_regs(CPUPPCState *env, - struct target_mcontext *frame, int sig) +static void restore_user_regs(CPUPPCState *env, + struct target_mcontext *frame, int sig) { target_ulong save_r2 = 0; target_ulong msr; @@ -4597,17 +4577,13 @@ static int restore_user_regs(CPUPPCState *env, /* Restore general registers. */ for (i = 0; i < ARRAY_SIZE(env->gpr); i++) { - if (__get_user(env->gpr[i], &frame->mc_gregs[i])) { - return 1; - } + __get_user(env->gpr[i], &frame->mc_gregs[i]); } - if (__get_user(env->nip, &frame->mc_gregs[TARGET_PT_NIP]) - || __get_user(env->ctr, &frame->mc_gregs[TARGET_PT_CTR]) - || __get_user(env->lr, &frame->mc_gregs[TARGET_PT_LNK]) - || __get_user(env->xer, &frame->mc_gregs[TARGET_PT_XER])) - return 1; - if (__get_user(ccr, &frame->mc_gregs[TARGET_PT_CCR])) - return 1; + __get_user(env->nip, &frame->mc_gregs[TARGET_PT_NIP]); + __get_user(env->ctr, &frame->mc_gregs[TARGET_PT_CTR]); + __get_user(env->lr, &frame->mc_gregs[TARGET_PT_LNK]); + __get_user(env->xer, &frame->mc_gregs[TARGET_PT_XER]); + __get_user(ccr, &frame->mc_gregs[TARGET_PT_CCR]); for (i = 0; i < ARRAY_SIZE(env->crf); i++) { env->crf[i] = (ccr >> (32 - ((i + 1) * 4))) & 0xf; @@ -4617,8 +4593,7 @@ static int restore_user_regs(CPUPPCState *env, env->gpr[2] = save_r2; } /* Restore MSR. */ - if (__get_user(msr, &frame->mc_gregs[TARGET_PT_MSR])) - return 1; + __get_user(msr, &frame->mc_gregs[TARGET_PT_MSR]); /* If doing signal return, restore the previous little-endian mode. */ if (sig) @@ -4630,28 +4605,22 @@ static int restore_user_regs(CPUPPCState *env, ppc_avr_t *avr = &env->avr[i]; ppc_avr_t *vreg = &frame->mc_vregs.altivec[i]; - if (__get_user(avr->u64[0], &vreg->u64[0]) || - __get_user(avr->u64[1], &vreg->u64[1])) { - return 1; - } + __get_user(avr->u64[0], &vreg->u64[0]); + __get_user(avr->u64[1], &vreg->u64[1]); } /* Set MSR_VEC in the saved MSR value to indicate that frame->mc_vregs contains valid data. */ - if (__get_user(env->spr[SPR_VRSAVE], - (target_ulong *)(&frame->mc_vregs.altivec[32].u32[3]))) - return 1; + __get_user(env->spr[SPR_VRSAVE], + (target_ulong *)(&frame->mc_vregs.altivec[32].u32[3])); } /* Restore floating point registers. */ if (env->insns_flags & PPC_FLOAT) { uint64_t fpscr; for (i = 0; i < ARRAY_SIZE(env->fpr); i++) { - if (__get_user(env->fpr[i], &frame->mc_fregs[i])) { - return 1; - } + __get_user(env->fpr[i], &frame->mc_fregs[i]); } - if (__get_user(fpscr, &frame->mc_fregs[32])) - return 1; + __get_user(fpscr, &frame->mc_fregs[32]); env->fpscr = (uint32_t) fpscr; } @@ -4661,23 +4630,16 @@ static int restore_user_regs(CPUPPCState *env, for (i = 0; i < ARRAY_SIZE(env->gpr); i++) { uint32_t hi; - if (__get_user(hi, &frame->mc_vregs.spe[i])) { - return 1; - } + __get_user(hi, &frame->mc_vregs.spe[i]); env->gpr[i] = ((uint64_t)hi << 32) | ((uint32_t) env->gpr[i]); } #else for (i = 0; i < ARRAY_SIZE(env->gprh); i++) { - if (__get_user(env->gprh[i], &frame->mc_vregs.spe[i])) { - return 1; - } + __get_user(env->gprh[i], &frame->mc_vregs.spe[i]); } #endif - if (__get_user(env->spe_fscr, &frame->mc_vregs.spe[32])) - return 1; + __get_user(env->spe_fscr, &frame->mc_vregs.spe[32]); } - - return 0; } static void setup_frame(int sig, struct target_sigaction *ka, @@ -4707,7 +4669,7 @@ static void setup_frame(int sig, struct target_sigaction *ka, __put_user(sig, &sc->signal); /* Save user regs. */ - err |= save_user_regs(env, &frame->mctx, TARGET_NR_sigreturn); + save_user_regs(env, &frame->mctx, TARGET_NR_sigreturn); /* The kernel checks for the presence of a VDSO here. We don't emulate a vdso, so use a sigreturn system call. */ @@ -4773,7 +4735,7 @@ static void setup_rt_frame(int sig, struct target_sigaction *ka, } frame = &rt_sf->uc.tuc_mcontext; - err |= save_user_regs(env, frame, TARGET_NR_rt_sigreturn); + save_user_regs(env, frame, TARGET_NR_rt_sigreturn); /* The kernel checks for the presence of a VDSO here. We don't emulate a vdso, so use a sigreturn system call. */ @@ -4833,8 +4795,7 @@ long do_sigreturn(CPUPPCState *env) __get_user(sr_addr, &sc->regs); if (!lock_user_struct(VERIFY_READ, sr, sr_addr, 1)) goto sigsegv; - if (restore_user_regs(env, sr, 1)) - goto sigsegv; + restore_user_regs(env, sr, 1); unlock_user_struct(sr, sr_addr, 1); unlock_user_struct(sc, sc_addr, 1); @@ -4872,15 +4833,10 @@ static int do_setcontext(struct target_ucontext *ucp, CPUPPCState *env, int sig) target_to_host_sigset_internal(&blocked, &set); do_sigprocmask(SIG_SETMASK, &blocked, NULL); - if (restore_user_regs(env, mcp, sig)) - goto sigsegv; + restore_user_regs(env, mcp, sig); unlock_user_struct(mcp, mcp_addr, 1); return 0; - -sigsegv: - unlock_user_struct(mcp, mcp_addr, 1); - return 1; #endif }