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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id 47si3270242qgf.108.2015.01.27.14.07.01 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 27 Jan 2015 14:07:02 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:49953 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YGDN0-0004tQ-AE for patch@linaro.org; Tue, 27 Jan 2015 16:08:22 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57053) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YGDM9-00046p-Kp for qemu-devel@nongnu.org; Tue, 27 Jan 2015 16:07:30 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YGDM4-0005lF-H0 for qemu-devel@nongnu.org; Tue, 27 Jan 2015 16:07:29 -0500 Received: from afflict.kos.to ([92.243.29.197]:35426) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YGDM4-0005l3-BK for qemu-devel@nongnu.org; Tue, 27 Jan 2015 16:07:24 -0500 Received: from afflict.kos.to (afflict [92.243.29.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by afflict.kos.to (Postfix) with ESMTPSA id 1C1E6264D7; Tue, 27 Jan 2015 22:07:23 +0100 (CET) From: riku.voipio@linaro.org To: qemu-devel@nongnu.org Date: Tue, 27 Jan 2015 23:07:15 +0200 Message-Id: X-Mailer: git-send-email 1.7.10.4 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 92.243.29.197 Cc: peter.maydell@linaro.org Subject: [Qemu-devel] [PULL 04/11] linux-user/main.c: Call cpu_exec_start/end on all target archs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: riku.voipio@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.42 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Peter Maydell The start_exclusive() infrastructure is used on all target architectures, even if only to do the "stop all CPUs before dumping core" in force_sig(), so be consistent and call cpu_exec_start/end in the main loop of every target. Signed-off-by: Peter Maydell Signed-off-by: Riku Voipio --- linux-user/main.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/linux-user/main.c b/linux-user/main.c index 8c70be4..95e8a51 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -283,7 +283,9 @@ void cpu_loop(CPUX86State *env) target_siginfo_t info; for(;;) { + cpu_exec_start(cs); trapnr = cpu_x86_exec(env); + cpu_exec_end(cs); switch(trapnr) { case 0x80: /* linux syscall from int $0x80 */ @@ -1288,7 +1290,9 @@ void cpu_loop (CPUSPARCState *env) target_siginfo_t info; while (1) { + cpu_exec_start(cs); trapnr = cpu_sparc_exec (env); + cpu_exec_end(cs); /* Compute PSR before exposing state. */ if (env->cc_op != CC_OP_FLAGS) { @@ -2656,7 +2660,9 @@ void cpu_loop(CPUOpenRISCState *env) int trapnr, gdbsig; for (;;) { + cpu_exec_start(cs); trapnr = cpu_exec(env); + cpu_exec_end(cs); gdbsig = 0; switch (trapnr) { @@ -2744,7 +2750,9 @@ void cpu_loop(CPUSH4State *env) target_siginfo_t info; while (1) { + cpu_exec_start(cs); trapnr = cpu_sh4_exec (env); + cpu_exec_end(cs); switch (trapnr) { case 0x160: @@ -2804,7 +2812,9 @@ void cpu_loop(CPUCRISState *env) target_siginfo_t info; while (1) { + cpu_exec_start(cs); trapnr = cpu_cris_exec (env); + cpu_exec_end(cs); switch (trapnr) { case 0xaa: { @@ -2863,7 +2873,9 @@ void cpu_loop(CPUMBState *env) target_siginfo_t info; while (1) { + cpu_exec_start(cs); trapnr = cpu_mb_exec (env); + cpu_exec_end(cs); switch (trapnr) { case 0xaa: { @@ -2966,7 +2978,9 @@ void cpu_loop(CPUM68KState *env) TaskState *ts = cs->opaque; for(;;) { + cpu_exec_start(cs); trapnr = cpu_m68k_exec(env); + cpu_exec_end(cs); switch(trapnr) { case EXCP_ILLEGAL: { @@ -3103,7 +3117,9 @@ void cpu_loop(CPUAlphaState *env) abi_long sysret; while (1) { + cpu_exec_start(cs); trapnr = cpu_alpha_exec (env); + cpu_exec_end(cs); /* All of the traps imply a transition through PALcode, which implies an REI instruction has been executed. Which means @@ -3289,7 +3305,9 @@ void cpu_loop(CPUS390XState *env) target_ulong addr; while (1) { + cpu_exec_start(cs); trapnr = cpu_s390x_exec(env); + cpu_exec_end(cs); switch (trapnr) { case EXCP_INTERRUPT: /* Just indicate that signals should be handled asap. */