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X-Received-From: 2607:f8b0:400c:c05::235 Cc: Jean-Christophe Dubois Subject: Re: [Qemu-devel] [PULL 00/27] target-arm queue X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org On 27 October 2015 at 14:33, Peter Maydell wrote: > Here's the target-arm queue for 2.5. > > Edgar's stage 2 patchset has been on list in various forms for > a while, and in any case the code doesn't kick in unless the > CPU has the EL2 feature bit set, which nothing in master does. > > I'm probably going to start getting a bit stricter about only > small features or bug fixes now, with a week and a half to hardfreeze. > > thanks > -- PMM > > The following changes since commit 7e038b94e74e1c2d1b3598e2e4b0b5c8b79a7278: > > Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into staging (2015-10-27 10:10:46 +0000) > > are available in the git repository at: > > > git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20151027 > > for you to fetch changes up to e194d166b4bc00fb0ce75f21eed67a9e94a25f65: > > target-arm: Add support for S1 + S2 MMU translations (2015-10-27 14:04:19 +0000) > > ---------------------------------------------------------------- > target-arm queue: > * more EL2 preparation: handling for stage 2 translations > * standardize debug macros in i.MX devices > * improve error message in a corner case for virt board > * disable live migration of KVM GIC if the kernel can't handle it > * add SPSR_(ABT|UND|IRQ|FIQ) registers > * handle non-executable page-straddling Thumb instructions > * fix a "no 64-bit EL2" assumption in arm_excp_unmasked() There's a format string error in the i.MX patches which means it won't compile on 32-bit systems or OSX: /home/petmay01/qemu/hw/char/imx_serial.c: In function 'imx_serial_realize': /home/petmay01/qemu/hw/char/imx_serial.c:321:9: error: format '%llx' expects argument of type 'long long unsigned int', but argument 5 has type 'ram_addr_t' [-Werror=format=] DPRINTF("No char dev for uart at 0x%" HWADDR_PRIx "\n", ^ We could fix this just by fixing the format string (to "0x" RAM_ADDR_FMT rather than "0x%" HWADDR_PRIx), but this code is wrong anyway, because it is fishing in the MemoryRegion struct, which is clearly documented as: /* All fields are private - violators will be prosecuted */ So we should just drop that. I will squash in the fix: and respin. thanks -- PMM diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c index 45cf00d..261608d 100644 --- a/hw/char/imx_serial.c +++ b/hw/char/imx_serial.c @@ -318,8 +318,7 @@ static void imx_serial_realize(DeviceState *dev, Error **errp) qemu_chr_add_handlers(s->chr, imx_can_receive, imx_receive, imx_event, s); } else { - DPRINTF("No char dev for uart at 0x%" HWADDR_PRIx "\n", - s->iomem.ram_addr); + DPRINTF("No char dev for uart"\n"); } }