From patchwork Thu Nov 28 17:07:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Newton X-Patchwork-Id: 21846 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pd0-f200.google.com (mail-pd0-f200.google.com [209.85.192.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 91CA320299 for ; Thu, 28 Nov 2013 17:07:40 +0000 (UTC) Received: by mail-pd0-f200.google.com with SMTP id p10sf22066618pdj.7 for ; Thu, 28 Nov 2013 09:07:39 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:message-id:date:from:user-agent :mime-version:to:cc:subject:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe:content-type :content-transfer-encoding; bh=tnzyf7WlUvxbD/0Q0Mst2iYpimBHm0QHsfT0LiDNcog=; b=m7FFdSc8wTSHvTSzp6ozkQeb8pGHpXNCtY67ObxD846BCpf5jzAMbWz7kaAH2xKQMM CYKiW6QHkwnPFWIbLb3zO6n3FuwDwfTWGc9sLckqzY2LU8tYlJnhNdu6nd/Qj01uiqNp Ml8ar+3xlkAWlf+VBXPwET4t0Khv5SDm98PjSsHilYjGasRdSKIngSHPTMnNXaEsp/lw om8P49fyH+RMDj9B10xSWrTbmudVlACIfaB2cq0wnBCfyzcHQnpZsGvfkkdBjGWpbn2c LE5TXbeWLjlcVcAtpGV1lbrL2Tu05FNtmHQHBGStDxSa9u7Z1HbEWvXK7W5cxrjUUHQy 750w== X-Gm-Message-State: ALoCoQn6/C/UGrPHlXdwoLwU5iQYyZfiusJjqabeydZtsS/kD+AwES6Ktv47aeZdkwXgE1t7vuuT X-Received: by 10.66.250.200 with SMTP id ze8mr3863561pac.29.1385658459742; Thu, 28 Nov 2013 09:07:39 -0800 (PST) X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.82.49 with SMTP id f17ls2763000qey.54.gmail; Thu, 28 Nov 2013 09:07:39 -0800 (PST) X-Received: by 10.52.232.226 with SMTP id tr2mr8347424vdc.26.1385658459570; Thu, 28 Nov 2013 09:07:39 -0800 (PST) Received: from mail-ve0-f174.google.com (mail-ve0-f174.google.com [209.85.128.174]) by mx.google.com with ESMTPS id lu1si23217347vcb.88.2013.11.28.09.07.39 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 28 Nov 2013 09:07:39 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.174 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.174; Received: by mail-ve0-f174.google.com with SMTP id pa12so6164019veb.5 for ; Thu, 28 Nov 2013 09:07:39 -0800 (PST) X-Received: by 10.52.186.228 with SMTP id fn4mr1475609vdc.34.1385658459378; Thu, 28 Nov 2013 09:07:39 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp29433vcz; Thu, 28 Nov 2013 09:07:38 -0800 (PST) X-Received: by 10.14.216.200 with SMTP id g48mr53327eep.129.1385658457930; Thu, 28 Nov 2013 09:07:37 -0800 (PST) Received: from mail-ea0-f174.google.com (mail-ea0-f174.google.com [209.85.215.174]) by mx.google.com with ESMTPS id r3si18628378eep.145.2013.11.28.09.07.37 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 28 Nov 2013 09:07:37 -0800 (PST) Received-SPF: neutral (google.com: 209.85.215.174 is neither permitted nor denied by best guess record for domain of will.newton@linaro.org) client-ip=209.85.215.174; Received: by mail-ea0-f174.google.com with SMTP id b10so5928374eae.5 for ; Thu, 28 Nov 2013 09:07:37 -0800 (PST) X-Received: by 10.15.49.195 with SMTP id j43mr6282798eew.40.1385658457479; Thu, 28 Nov 2013 09:07:37 -0800 (PST) Received: from localhost.localdomain (cpc6-seac21-2-0-cust453.7-2.cable.virginm.net. [82.1.113.198]) by mx.google.com with ESMTPSA id m1sm26121281eeg.0.2013.11.28.09.07.33 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 28 Nov 2013 09:07:36 -0800 (PST) Message-ID: <52977853.9010104@linaro.org> Date: Thu, 28 Nov 2013 17:07:31 +0000 From: Will Newton User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.0 MIME-Version: 1.0 To: qemu-devel@nongnu.org CC: Patch Tracking Subject: [PATCH v6 2/4] target-arm: Implement ARMv8 VSEL instruction. X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: will.newton@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.174 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This adds support for the VSEL floating point selection instruction which was added in ARMv8. Signed-off-by: Will Newton --- target-arm/translate.c | 130 ++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 129 insertions(+), 1 deletion(-) Changes in v6: - None diff --git a/target-arm/translate.c b/target-arm/translate.c index 5a6c1ea..4e7077e 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -2614,6 +2614,134 @@ static TCGv_i32 gen_load_and_replicate(DisasContext *s, TCGv_i32 addr, int size) return tmp; } +static int disas_vfp_v8_insn(CPUARMState *env, DisasContext *s, uint32_t insn) +{ + uint32_t rd, rn, rm, dp = (insn >> 8) & 1; + + if (!arm_feature(env, ARM_FEATURE_V8)) { + return 1; + } + + if (dp) { + VFP_DREG_D(rd, insn); + VFP_DREG_N(rn, insn); + VFP_DREG_M(rm, insn); + } else { + rd = VFP_SREG_D(insn); + rn = VFP_SREG_N(insn); + rm = VFP_SREG_M(insn); + } + + if ((insn & 0x0f800e50) == 0x0e000a00) { + /* vsel */ + uint32_t cc = (insn >> 20) & 3; + + if (dp) { + TCGv_i64 ftmp1, ftmp2, ftmp3; + TCGv_i64 tmp, zero, zf, nf, vf; + + zero = tcg_const_i64(0); + + ftmp1 = tcg_temp_new_i64(); + ftmp2 = tcg_temp_new_i64(); + ftmp3 = tcg_temp_new_i64(); + + zf = tcg_temp_new_i64(); + nf = tcg_temp_new_i64(); + vf = tcg_temp_new_i64(); + + tcg_gen_extu_i32_i64(zf, cpu_ZF); + tcg_gen_extu_i32_i64(nf, cpu_NF); + tcg_gen_extu_i32_i64(vf, cpu_VF); + + tcg_gen_ld_f64(ftmp1, cpu_env, vfp_reg_offset(dp, rn)); + tcg_gen_ld_f64(ftmp2, cpu_env, vfp_reg_offset(dp, rm)); + switch (cc) { + case 0: /* eq: Z */ + tcg_gen_movcond_i64(TCG_COND_EQ, ftmp3, zf, zero, + ftmp1, ftmp2); + break; + case 1: /* vs: V */ + tcg_gen_movcond_i64(TCG_COND_LT, ftmp3, vf, zero, + ftmp1, ftmp2); + break; + case 2: /* ge: N == V -> N ^ V == 0 */ + tmp = tcg_temp_new_i64(); + tcg_gen_xor_i64(tmp, vf, nf); + tcg_gen_movcond_i64(TCG_COND_GE, ftmp3, tmp, zero, + ftmp1, ftmp2); + tcg_temp_free_i64(tmp); + break; + case 3: /* gt: !Z && N == V */ + tcg_gen_movcond_i64(TCG_COND_NE, ftmp3, zf, zero, + ftmp1, ftmp2); + tmp = tcg_temp_new_i64(); + tcg_gen_xor_i64(tmp, vf, nf); + tcg_gen_movcond_i64(TCG_COND_GE, ftmp3, tmp, zero, + ftmp3, ftmp2); + tcg_temp_free_i64(tmp); + break; + } + tcg_gen_st_f64(ftmp3, cpu_env, vfp_reg_offset(dp, rd)); + tcg_temp_free_i64(ftmp1); + tcg_temp_free_i64(ftmp2); + tcg_temp_free_i64(ftmp3); + + tcg_temp_free_i64(zf); + tcg_temp_free_i64(nf); + tcg_temp_free_i64(vf); + + tcg_temp_free_i64(zero); + } else { + TCGv_i32 ftmp1, ftmp2, ftmp3; + TCGv_i32 tmp, zero; + + zero = tcg_const_i32(0); + + ftmp1 = tcg_temp_new_i32(); + ftmp2 = tcg_temp_new_i32(); + ftmp3 = tcg_temp_new_i32(); + tcg_gen_ld_f32(ftmp1, cpu_env, vfp_reg_offset(dp, rn)); + tcg_gen_ld_f32(ftmp2, cpu_env, vfp_reg_offset(dp, rm)); + switch (cc) { + case 0: /* eq: Z */ + tcg_gen_movcond_i32(TCG_COND_EQ, ftmp3, cpu_ZF, zero, + ftmp1, ftmp2); + break; + case 1: /* vs: V */ + tcg_gen_movcond_i32(TCG_COND_LT, ftmp3, cpu_VF, zero, + ftmp1, ftmp2); + break; + case 2: /* ge: N == V -> N ^ V == 0 */ + tmp = tcg_temp_new_i32(); + tcg_gen_xor_i32(tmp, cpu_VF, cpu_NF); + tcg_gen_movcond_i32(TCG_COND_GE, ftmp3, tmp, zero, + ftmp1, ftmp2); + tcg_temp_free_i32(tmp); + break; + case 3: /* gt: !Z && N == V */ + tcg_gen_movcond_i32(TCG_COND_NE, ftmp3, cpu_ZF, zero, + ftmp1, ftmp2); + tmp = tcg_temp_new_i32(); + tcg_gen_xor_i32(tmp, cpu_VF, cpu_NF); + tcg_gen_movcond_i32(TCG_COND_GE, ftmp3, tmp, zero, + ftmp3, ftmp2); + tcg_temp_free_i32(tmp); + break; + } + tcg_gen_st_f32(ftmp3, cpu_env, vfp_reg_offset(dp, rd)); + tcg_temp_free_i32(ftmp1); + tcg_temp_free_i32(ftmp2); + tcg_temp_free_i32(ftmp3); + + tcg_temp_free_i32(zero); + } + + return 0; + } + return 1; +} + /* Disassemble a VFP instruction. Returns nonzero if an error occurred (ie. an undefined instruction). */ static int disas_vfp_insn(CPUARMState * env, DisasContext *s, uint32_t insn) @@ -2640,7 +2768,7 @@ static int disas_vfp_insn(CPUARMState * env, DisasContext *s, uint32_t insn) if (extract32(insn, 28, 4) == 0xf) { /* Encodings with T=1 (Thumb) or unconditional (ARM): only used in v8 and above. */ - return 1; + return disas_vfp_v8_insn(env, s, insn); } dp = ((insn & 0xf00) == 0xb00);