From patchwork Wed May 14 19:00:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tokarev X-Patchwork-Id: 889881 Delivered-To: patch@linaro.org Received: by 2002:adf:fd8a:0:b0:3a1:f579:ae88 with SMTP id d10csp2781994wrr; Wed, 14 May 2025 12:03:25 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVyAtPBwX+iMs5MJt0PemCMLrvWRhgRBnIBR+spg6dd4kYqvONmJyM9Y+K1qdJSAIbS8aAiIg==@linaro.org X-Google-Smtp-Source: AGHT+IEGGyi2kIz7VvKlwP43spM/QFK4TVmQ4iINgeWyySKesjr/ATHBeLYCM0NHHFgDaIboMCKa X-Received: by 2002:a05:622a:260f:b0:472:1225:bd98 with SMTP id d75a77b69052e-49495d01c60mr85852171cf.50.1747249405396; Wed, 14 May 2025 12:03:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1747249405; cv=none; d=google.com; s=arc-20240605; b=YRMtlNB5BUBP8gDK5ZqXYM9a0jaALuA9dIuBvPe7lqFmXDlKroqfXWwt9MewCYeHLN syHfCtCNB/AwMaSZ9gJzmJ+baP7d6ohzGTqF3xNproYU8dlJq/rCv2UcpXlv6aG0OvdR kB8iqDd0HC5fPc4dkQ5OuPf/H9WXdYXMqQEJY9RLdEp1Wfdy3e9j2xQuiOa04Ki3qLQ5 TgAuAL2bA1CQ5qpzxckvjYTHAR0jPPxj87fLG7LFfgblOj3qrRx+hQYmsE5jlzIo/+lU hyf1JxproSsW/iNBlAt4CFLg3Jsyn0a577dbFryRI0tYZPQq8V3UoWU08B40XtUrV0gE SyuA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=/4E8mqbMdIas7KwsAjEFzap2P0qAGRjgfsaZSb3IS1Y=; fh=slBUHiphGZf68YtXAZoDwMwGT4RM1dtceEFytJ1qTrs=; b=IUY2TvupQ62zGLZgBTNmrSuLLjb0vSfUNsxWCfSvTnuEoV3bq72hxZmKAcUGRElprB 1naoMN24UrOt4qJeC2VIgLw+4x+uYPH0hpPpcSxA8BAhri99B6WwLAXxrOnFy96oofYw V9vsOiYT5Kum8ufTrzSz/mDzIruziIh0ejuH3zAcW7MSsbJghUEdonZEsHRcxq6PDCvu YDl1V7lUlz/HgBNn35DIejUNP+PbAEJuCWzKFv+FQG7P80CUe2SW8keCR4ggzbwAgfCL Kjac/MwwqwIff4LVtYb+IxDJAILdRij7WSCCt/jeqlYUWa2FWUz7Oox0pF+QV8tEyAbG lfpA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-4945245b2edsi147003521cf.58.2025.05.14.12.03.25 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 14 May 2025 12:03:25 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uFHNg-0007Dp-Ns; Wed, 14 May 2025 15:03:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uFHLc-0004Cw-Cn; Wed, 14 May 2025 15:00:58 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uFHLa-0007J8-Gu; Wed, 14 May 2025 15:00:56 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 1E18D121D8E; Wed, 14 May 2025 22:00:32 +0300 (MSK) Received: from think4mjt.tls.msk.ru (mjtthink.wg.tls.msk.ru [192.168.177.146]) by tsrv.corpit.ru (Postfix) with ESMTP id 26CFB20BA80; Wed, 14 May 2025 22:00:42 +0300 (MSK) From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Richard Henderson , Pierrick Bouvier , Michael Tokarev Subject: [Stable-10.0.1 04/23] target/avr: Improve decode of LDS, STS Date: Wed, 14 May 2025 22:00:16 +0300 Message-Id: <20250514190041.104759-4-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson The comment about not being able to define a field with zero bits is out of date since 94597b6146f3 ("decodetree: Allow !function with no input bits"). This fixes the missing load of imm in the disassembler. Cc: qemu-stable@nongnu.org Fixes: 9d8caa67a24 ("target/avr: Add support for disassembling via option '-d in_asm'") Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson (cherry picked from commit 6b661b7ed7cd02c54a78426d5eb7dd8543b030ed) Signed-off-by: Michael Tokarev diff --git a/target/avr/insn.decode b/target/avr/insn.decode index 482c23ad0c..cc302249db 100644 --- a/target/avr/insn.decode +++ b/target/avr/insn.decode @@ -118,11 +118,8 @@ BRBC 1111 01 ....... ... @op_bit_imm @io_rd_imm .... . .. ..... .... &rd_imm rd=%rd imm=%io_imm @ldst_d .. . . .. . rd:5 . ... &rd_imm imm=%ldst_d_imm -# The 16-bit immediate is completely in the next word. -# Fields cannot be defined with no bits, so we cannot play -# the same trick and append to a zero-bit value. -# Defer reading the immediate until trans_{LDS,STS}. -@ldst_s .... ... rd:5 .... imm=0 +%ldst_imm !function=next_word +@ldst_s .... ... rd:5 .... imm=%ldst_imm MOV 0010 11 . ..... .... @op_rd_rr MOVW 0000 0001 .... .... &rd_rr rd=%rd_d rr=%rr_d diff --git a/target/avr/translate.c b/target/avr/translate.c index 4ab71d8138..e7f8ced9b3 100644 --- a/target/avr/translate.c +++ b/target/avr/translate.c @@ -1578,7 +1578,6 @@ static bool trans_LDS(DisasContext *ctx, arg_LDS *a) TCGv Rd = cpu_r[a->rd]; TCGv addr = tcg_temp_new_i32(); TCGv H = cpu_rampD; - a->imm = next_word(ctx); tcg_gen_mov_tl(addr, H); /* addr = H:M:L */ tcg_gen_shli_tl(addr, addr, 16); @@ -1783,7 +1782,6 @@ static bool trans_STS(DisasContext *ctx, arg_STS *a) TCGv Rd = cpu_r[a->rd]; TCGv addr = tcg_temp_new_i32(); TCGv H = cpu_rampD; - a->imm = next_word(ctx); tcg_gen_mov_tl(addr, H); /* addr = H:M:L */ tcg_gen_shli_tl(addr, addr, 16);