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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id e9e14a558f8ab-3d975f6d755sm3065295ab.69.2025.05.01.14.05.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 01 May 2025 14:06:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Cl=C3=A9ment_Mathieu--Drif?= , Zhao Liu , Hanna Reitz , Igor Mammedov , Marcel Apfelbaum , =?utf-8?q?Philippe_Mathieu-D?= =?utf-8?q?aud=C3=A9?= , Paolo Bonzini , Eduardo Habkost , qemu-block@nongnu.org, Jason Wang , Richard Henderson , Yanan Wang , Ani Sinha , "Michael S. Tsirkin" , Thomas Huth , Gerd Hoffmann , Kevin Wolf , Yi Liu Subject: [PATCH 07/18] hw/pci/pcie: Remove QEMU_PCIE_EXTCAP_INIT definition Date: Thu, 1 May 2025 23:04:45 +0200 Message-ID: <20250501210456.89071-8-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250501210456.89071-1-philmd@linaro.org> References: <20250501210456.89071-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::12c; envelope-from=philmd@linaro.org; helo=mail-il1-x12c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QEMU_PCIE_EXTCAP_INIT was only used by the hw_compat_2_8[] array, via the 'x-pcie-extcap-init=off' property. We removed all machines using that array, lets remove all the code around QEMU_PCIE_EXTCAP_INIT. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/pci/pci.h | 2 -- hw/pci/pci.c | 2 -- hw/pci/pcie.c | 5 ----- 3 files changed, 9 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index c2fe6caa2c6..6c72a61c4b6 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -210,8 +210,6 @@ enum { /* Link active status in endpoint capability is always set */ #define QEMU_PCIE_LNKSTA_DLLLA_BITNR 8 QEMU_PCIE_LNKSTA_DLLLA = (1 << QEMU_PCIE_LNKSTA_DLLLA_BITNR), -#define QEMU_PCIE_EXTCAP_INIT_BITNR 9 - QEMU_PCIE_EXTCAP_INIT = (1 << QEMU_PCIE_EXTCAP_INIT_BITNR), #define QEMU_PCIE_CXL_BITNR 10 QEMU_PCIE_CAP_CXL = (1 << QEMU_PCIE_CXL_BITNR), #define QEMU_PCIE_ERR_UNC_MASK_BITNR 11 diff --git a/hw/pci/pci.c b/hw/pci/pci.c index fe38c4c0287..36206c77b7c 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -90,8 +90,6 @@ static const Property pci_props[] = { QEMU_PCI_CAP_MULTIFUNCTION_BITNR, false), DEFINE_PROP_BIT("x-pcie-lnksta-dllla", PCIDevice, cap_present, QEMU_PCIE_LNKSTA_DLLLA_BITNR, true), - DEFINE_PROP_BIT("x-pcie-extcap-init", PCIDevice, cap_present, - QEMU_PCIE_EXTCAP_INIT_BITNR, true), DEFINE_PROP_STRING("failover_pair_id", PCIDevice, failover_pair_id), DEFINE_PROP_UINT32("acpi-index", PCIDevice, acpi_index, 0), diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 1b12db6fa29..a3969423bd3 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -245,11 +245,6 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLPPB); - if (dev->cap_present & QEMU_PCIE_EXTCAP_INIT) { - /* read-only to behave like a 'NULL' Extended Capability Header */ - pci_set_long(dev->wmask + PCI_CONFIG_SPACE_SIZE, 0); - } - return pos; }