From patchwork Thu May 1 14:55:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 886338 Delivered-To: patch@linaro.org Received: by 2002:a5d:430f:0:b0:38f:210b:807b with SMTP id h15csp358557wrq; Thu, 1 May 2025 07:56:18 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWm9avPDgUG+JSb8yEPxCTUy2xc4Ow9Fb8g3dtObrAOU7WY6dwUZAhrEXjWRZx7zzch4aPCtA==@linaro.org X-Google-Smtp-Source: AGHT+IFQ4WtwAmyiXYRjaPDMARUeJ7BGrlfoy5+qjVjSzREq0OMTAjdR3XYxfTbiPKRxh8FxpJqh X-Received: by 2002:a05:622a:420e:b0:471:fdf5:3cd7 with SMTP id d75a77b69052e-48b2176d0c1mr43442891cf.37.1746111378451; Thu, 01 May 2025 07:56:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1746111378; cv=none; d=google.com; s=arc-20240605; b=XYjsEdoAtbUmsKwprFqYu6+RSI8PMZUgM4UD2FHVQLj6k6Ls3xpYLtYH2q24Qj/u1U cOcQWRuLhEoYC+gNvIz6krUyulKzHsxQAX9u3LzJpjqwSCsHfIZi4kU78bIHE0ogG/Ek B2VEN0JcGKrqidmTj+bO8QLQu+BH2wITVnY15yrgj7XDTqqiTAAq3hANlNmAJhcC1GgI Fn1GTpXLebFdw3KTqZEn8r5FWUtDBmS6/u2JUwI+6kOjSRPgzFElMEaoq0u5C2K7xb/d esINh+w9adBeBFAsZMHHcBwuni+n0BnnB9HAWVHv3XhJEPYQkPhv9Xs+gnOR75vR70k/ PYow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=OKdlxq7vj1lY48Y8P5jMGdkGRsWPnW4o2KqIcZOb+Nc=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=Ir55pdo3uVNIxcA9ktzMyJgCD+q5V6gHL6yoCTZ3O3TAQxljmAFZq0f2Aky/DsFL28 aWd0EJ6gxezWhIwiY6+FYlITWbM5eM6t5OS7r3Vbkkz5dmtpfCu/zpkELYYSZ4pycJoW WcxuvTI7u3hnaWig6lDqCHZsgwngBWfJRAVaNT7RcNkoQZpUryt34lpts/9faGy3HbMB 7L5BwaOJ12WOPMn+XYXzUXYANGNeQCVkeaeeFeIBEg5YcaEHmseF7FwKdh2LJ/VAG4/N MSc80wSb7bXDqTs3/a6BY0fZU6IwImx0+6ZfjjHBJB1SOLg9kvNY5XmcR3Ah0UHQfrq+ p7gA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RcgL596h; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-48b966c60e2si7825611cf.159.2025.05.01.07.56.18 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 01 May 2025 07:56:18 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RcgL596h; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uAVJz-0005gx-9p; Thu, 01 May 2025 10:55:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uAVJu-0005dl-Vh for qemu-devel@nongnu.org; Thu, 01 May 2025 10:55:26 -0400 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1uAVJs-0005QT-7V for qemu-devel@nongnu.org; Thu, 01 May 2025 10:55:26 -0400 Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-227d6b530d8so11603785ad.3 for ; Thu, 01 May 2025 07:55:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1746111323; x=1746716123; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=OKdlxq7vj1lY48Y8P5jMGdkGRsWPnW4o2KqIcZOb+Nc=; b=RcgL596hjSV5/UwMA8/wNWmsmW6ELIIDddfsNbHcidtKB2LagEcrb7owpslz8fZSbL r2WMCK2uPbJlfct68Jy/w7hRlunjf+/0hGV29y+9Dpp1nGZLX2YFfh/9sTIuiB/OI0fD EYE70xg++60c0dzhdWEanuBKhnbk6juEwdPk8oG+gNxo/G65hts9MfNaG1idO19JuMIM 74g2D21Qc/6ehh8XwxOYQaBEHP8Zo/0MhMaUM8aSmErtARlNOtY9/5AruWnVnEIKGUJa GZoGVIS7lxM+++nNzeIpsEnUtS8gZrZgBP5dQYEqRYSrCjb38AwLjm8KCIavALY3HH2x Aq0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1746111323; x=1746716123; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OKdlxq7vj1lY48Y8P5jMGdkGRsWPnW4o2KqIcZOb+Nc=; b=l3nJKVdekMnsFplMTgpQ1zcDs06ZgkoKiChGVar0g6OFMeWYyEWlWWZYlrD0k17NEx Ip9k93Kx2X32QqNdrPsiw1ziuswMjh2TgCQythWrwDCNwetctbWCSIVXAudsqSfJpJ+E Pk6jA0uLW36G2SVeSxZeaZWkb4eq9oN2IcEB2o0HhAziqoWfsHq/fb3SbCI7JiVEu7Qy sQxHAPe5vJBPZiJ3ITNTgQfBy8qi+KNQDjweTZ+OtCIuxhgIipefEvjOY2dUU5ViDzlS 67l6SNBVFQ2rjBaBoasiboK05yTIWD1yJebO1EuvgyjRiizWWz/xsXwmi79aIZFWszEZ W5fg== X-Gm-Message-State: AOJu0Yzg3ZRk6oEVT1VK5ySx6O3WZV0/Z8iYoFWfiykBZq05KBqLWEL8 9OvLgTOLRD3uXOV767ps4bhAeXVBqic/pmDymtwKJKd0SdXLsfVtBSl15bv6AF7atfbSkzSk72C 3 X-Gm-Gg: ASbGncsTVOIQV6/s3DagqqSMMhH16TNtyAq0+4DdJmMgBJLi4cUBSy8Fx+5evp23nji 4XtZNEnBco5xMkTrU4mPiVZPVN73GwSgbPgalehF0cgd2PGwawlTo/897wDqySyMTNXphxp5SQX /GqzA3ComLBsU5FRxy//yBkVd6nBmaaGmhZTbOJctp6wZpQr3fDgVj2SoTIIXG4n7WyPhe+6sai pI6X1NeBdaaQNSAsapIIi5uZnYk7MPLpvSMm/H8kIvE/8Z8e/FRhTV/2yKDRHLs9OlUejXuVjw3 YYlrjfg99R722RDAgRXHw3iJPnMH5LJ1aCVVGliTUUNe4RqAK6q+pddEDM4aZDK9jWNiTn9JgdE = X-Received: by 2002:a17:903:1a6b:b0:226:3781:379d with SMTP id d9443c01a7336-22e0863a896mr43920245ad.33.1746111322699; Thu, 01 May 2025 07:55:22 -0700 (PDT) Received: from stoup.. (71-212-47-143.tukw.qwest.net. [71.212.47.143]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-22e0bb0e770sm7644415ad.92.2025.05.01.07.55.22 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 May 2025 07:55:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 02/11] accel/tcg: Move tlb_vaddr_to_host declaration to probe.h Date: Thu, 1 May 2025 07:55:10 -0700 Message-ID: <20250501145520.2695073-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250501145520.2695073-1-richard.henderson@linaro.org> References: <20250501145520.2695073-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This is a probing function, not a load/store function. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daudé --- include/accel/tcg/cpu-ldst.h | 16 ---------------- include/accel/tcg/probe.h | 16 ++++++++++++++++ 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/include/accel/tcg/cpu-ldst.h b/include/accel/tcg/cpu-ldst.h index 00e6419e13..0de7f5eaa6 100644 --- a/include/accel/tcg/cpu-ldst.h +++ b/include/accel/tcg/cpu-ldst.h @@ -502,20 +502,4 @@ static inline uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr) return cpu_ldq_code_mmu(env, addr, oi, 0); } -/** - * tlb_vaddr_to_host: - * @env: CPUArchState - * @addr: guest virtual address to look up - * @access_type: 0 for read, 1 for write, 2 for execute - * @mmu_idx: MMU index to use for lookup - * - * Look up the specified guest virtual index in the TCG softmmu TLB. - * If we can translate a host virtual address suitable for direct RAM - * access, without causing a guest exception, then return it. - * Otherwise (TLB entry is for an I/O access, guest software - * TLB fill required, etc) return NULL. - */ -void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr, - MMUAccessType access_type, int mmu_idx); - #endif /* ACCEL_TCG_CPU_LDST_H */ diff --git a/include/accel/tcg/probe.h b/include/accel/tcg/probe.h index 177bd1608d..dd9ecbbdf1 100644 --- a/include/accel/tcg/probe.h +++ b/include/accel/tcg/probe.h @@ -103,4 +103,20 @@ int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size, #endif /* !CONFIG_USER_ONLY */ +/** + * tlb_vaddr_to_host: + * @env: CPUArchState + * @addr: guest virtual address to look up + * @access_type: 0 for read, 1 for write, 2 for execute + * @mmu_idx: MMU index to use for lookup + * + * Look up the specified guest virtual index in the TCG softmmu TLB. + * If we can translate a host virtual address suitable for direct RAM + * access, without causing a guest exception, then return it. + * Otherwise (TLB entry is for an I/O access, guest software + * TLB fill required, etc) return NULL. + */ +void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr, + MMUAccessType access_type, int mmu_idx); + #endif