diff mbox series

[02/11] accel/tcg: Move tlb_vaddr_to_host declaration to probe.h

Message ID 20250501145520.2695073-3-richard.henderson@linaro.org
State Superseded
Headers show
Series accel/tcg: Finish building once | expand

Commit Message

Richard Henderson May 1, 2025, 2:55 p.m. UTC 
This is a probing function, not a load/store function.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/accel/tcg/cpu-ldst.h | 16 ----------------
 include/accel/tcg/probe.h    | 16 ++++++++++++++++
 2 files changed, 16 insertions(+), 16 deletions(-)

Comments

Pierrick Bouvier May 1, 2025, 4 p.m. UTC | #1 
On 5/1/25 7:55 AM, Richard Henderson wrote:
> This is a probing function, not a load/store function.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   include/accel/tcg/cpu-ldst.h | 16 ----------------
>   include/accel/tcg/probe.h    | 16 ++++++++++++++++
>   2 files changed, 16 insertions(+), 16 deletions(-)

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Philippe Mathieu-Daudé May 1, 2025, 5:24 p.m. UTC | #2 
On 1/5/25 16:55, Richard Henderson wrote:
> This is a probing function, not a load/store function.

TIL.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   include/accel/tcg/cpu-ldst.h | 16 ----------------
>   include/accel/tcg/probe.h    | 16 ++++++++++++++++
>   2 files changed, 16 insertions(+), 16 deletions(-)
diff mbox series

Patch

diff --git a/include/accel/tcg/cpu-ldst.h b/include/accel/tcg/cpu-ldst.h
index 00e6419e13..0de7f5eaa6 100644
--- a/include/accel/tcg/cpu-ldst.h
+++ b/include/accel/tcg/cpu-ldst.h
@@ -502,20 +502,4 @@  static inline uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
     return cpu_ldq_code_mmu(env, addr, oi, 0);
 }
 
-/**
- * tlb_vaddr_to_host:
- * @env: CPUArchState
- * @addr: guest virtual address to look up
- * @access_type: 0 for read, 1 for write, 2 for execute
- * @mmu_idx: MMU index to use for lookup
- *
- * Look up the specified guest virtual index in the TCG softmmu TLB.
- * If we can translate a host virtual address suitable for direct RAM
- * access, without causing a guest exception, then return it.
- * Otherwise (TLB entry is for an I/O access, guest software
- * TLB fill required, etc) return NULL.
- */
-void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr,
-                        MMUAccessType access_type, int mmu_idx);
-
 #endif /* ACCEL_TCG_CPU_LDST_H */
diff --git a/include/accel/tcg/probe.h b/include/accel/tcg/probe.h
index 177bd1608d..dd9ecbbdf1 100644
--- a/include/accel/tcg/probe.h
+++ b/include/accel/tcg/probe.h
@@ -103,4 +103,20 @@  int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size,
 
 #endif /* !CONFIG_USER_ONLY */
 
+/**
+ * tlb_vaddr_to_host:
+ * @env: CPUArchState
+ * @addr: guest virtual address to look up
+ * @access_type: 0 for read, 1 for write, 2 for execute
+ * @mmu_idx: MMU index to use for lookup
+ *
+ * Look up the specified guest virtual index in the TCG softmmu TLB.
+ * If we can translate a host virtual address suitable for direct RAM
+ * access, without causing a guest exception, then return it.
+ * Otherwise (TLB entry is for an I/O access, guest software
+ * TLB fill required, etc) return NULL.
+ */
+void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr,
+                        MMUAccessType access_type, int mmu_idx);
+
 #endif