From patchwork Tue Apr 29 13:21:57 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 885722 Delivered-To: patch@linaro.org Received: by 2002:a5d:4884:0:b0:38f:210b:807b with SMTP id g4csp321246wrq; Tue, 29 Apr 2025 06:24:00 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUjMsb8UrydcGmheS0OA4rOCBnczYpIFzJrJgk+R9gwvWi4QYYlAKtZCpk9EdryOIGQ45kTdQ==@linaro.org X-Google-Smtp-Source: AGHT+IG2ih666aEh0pyi6i/3C3HJMXoTZaXhEdoHlM6yi/6M1Vv16H0VW7UgWBwkiCMmh5Lfc6VF X-Received: by 2002:a05:622a:58c3:b0:476:75d0:a1e1 with SMTP id d75a77b69052e-488124cb727mr50428941cf.9.1745933039717; Tue, 29 Apr 2025 06:23:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1745933039; cv=none; d=google.com; s=arc-20240605; b=LlD4h2z3A/axgcM2zWOlhQpddRG5EJY0ZqJMwnBQeXPJRiW33J71FO4gvspqoKBnLd HnvGCvE661TKul5dBfnNVAQIoUFHcHKYIAB/XssNdfb13WWE9dIXf+fB2RkR02mMmAGk Gl6rvMaQH5jImII13to3mJy3ZmcPyDqXPteEnjcTc5ns0F1UN36kNAvvrgUVQY69cqMS qQoK7yr3itpb7A1JpGOxXz5mHoGLlybHDFcuaXPNPLsNlqGosgiKyA+EYmc6OabwVvC4 sN+I+KBDIYAoDOlef5LxTThtYKTK9Lu6NTUH8r/GQjZ6dlzB7kEy4m18R4025NJDzjhN vCqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=PW9jN2yS/TAOGn5xgs3qpwNb9whA0g2Y1AVjroSf5VQ=; fh=Jf09H9I4VaHbgN8mQ13fIEtUNqkBvOSdRrW68i91mfA=; b=ccDNRUSEpTn26cynN3x/mqp7EktzAMW66QbNpY+fi9jQyZSwek4PejDLv0XZVtK7oQ c/JNRk99SD0fZwP2j1hUcvUIMZkip3DC3C0Wqkn3qhRsqVUO8PBZbdN/rIKEiJWc3p7Y F2q+54wKaY55sXsLWMSCirD85E/PCQC7zen4/XgVP9DY38vn+aSsm8pF4RFdEGafbIiF FT7fyywaOBIMF0knv8Ei+wXPK3ZiNqs9+73nosWbNLK09zkLbMDP5+Azd6cKMXTgTTgu QJ8/0WK5MXoQDio+toU332ktxy4jZ74Z7sXYYrAz94I7yH/VSr9ZqThUNdU9nHkGzwBo Nq1Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=olAB2tiG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 6a1803df08f44-6f4c0b08f54si124221006d6.395.2025.04.29.06.23.59 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 29 Apr 2025 06:23:59 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=olAB2tiG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u9kvP-0005EU-DD; Tue, 29 Apr 2025 09:23:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u9kuk-00056r-03 for qemu-devel@nongnu.org; Tue, 29 Apr 2025 09:22:24 -0400 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1u9kue-0005eH-1x for qemu-devel@nongnu.org; Tue, 29 Apr 2025 09:22:21 -0400 Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-39c14016868so6066680f8f.1 for ; Tue, 29 Apr 2025 06:22:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1745932927; x=1746537727; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PW9jN2yS/TAOGn5xgs3qpwNb9whA0g2Y1AVjroSf5VQ=; b=olAB2tiGjw62DXbVy4Y6nqAvupBwXUTbLrceTOshH9RXmMAnrQ5EpLWCYAsNiNAwE8 maU4p8+4wa4zaQ/Zmbc9K5rHAmAfa6s/kikpg4PWA2dLwy6SHf1xDIEbi8ifJ5raCh4w gJS+WJrLrNVjpOXCBHSYUjmd15jE50NsnUcHkuIWJ5sND6fXI6GcoMItp3FNpWkWzzbB svPGD5HIem4K9YHciMIxHuZQfkv7Wkysrw51TaAKGqe6SkRF9RdiCUXhK9Q/H4yd0zBi Fubp6lGB2AzOR6rT4LrKFYBsv7FrAWGoArcJqAE0nD9sZLBSQnmG1bAvhbOu6Yrzd4lT Wy/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1745932927; x=1746537727; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PW9jN2yS/TAOGn5xgs3qpwNb9whA0g2Y1AVjroSf5VQ=; b=MCXCSqirtY1xc+PyNIldKjA02F7BNrCfL95al8Y5p6DEm0K4k7sBeelUrZ4p4PUkPT sdasbqDuCX6uzMvUoGLl/JjjN/wZj+kN56raCjr43DP8LD6chtsP56dsqbE/5mmIqxEV ZSsHPwFlEMzqYPtc/eJC6AbwcM42ZeWy6wHTRsNhsdckVjYyrjmF/wAuA8ZMLoP8/jjN BKc+s+6VBmK0v7VfF1PHicNbcV7+fUwrwOkVVsej/pB6vHhXLM01R+T9s1pCjwW1srWW hg6aJQ5CkZGqnH5SuML6NeYxiB9Q0QOFuursMI2bPDgK5D8eLpyc1vs69xDdpYJs9GDf TqxA== X-Forwarded-Encrypted: i=1; AJvYcCUDnbwMCznNo2RNHTBSJ2jbDeCBKAlnsoS+5qL4VsMYrLtaGCkHx/ti9sxJiCPQ5HkS+dzU06WmRVQr@nongnu.org X-Gm-Message-State: AOJu0YwknwL/iT0DfB3+kc/Dk+xBNp3D3z6D2hdllFUbEIplqf8xAZMK yIG2VBzL7QRgVCG+ciXoJ4WzwAPniFWu5GXHPBv6Ji4NARDAfCrTlJkdkH5L5fU= X-Gm-Gg: ASbGnculeUVeanXvxb1oiUDMAdRx+0p9qqUDpcgRQq2z2DFU8fPtMfdrSswe87cauD5 iyjA9l+W6/XiCBv7furYE3I302gQGD+SuRdvfobGIytDngWr9FhRRfcMLLgssy4/zJfk6c/YfYR D+NTicHRGcJGpMVjsAejjsLuYAcYejkqbxItHEG2/ZDwni1PyQMVoEAhVHPcUOJEFEZunyK6j7x RhHpIK88jnID1eT90Wy9pmnnQVmILnXEI92Ru5ESFOwOfzAU3HpJ2Z61dBP7LJu6drtcD/Bc7nn oYwu2QvOtQZyla9OML4fIHy0ekY34742E5YDXurytu+pxRs= X-Received: by 2002:a05:6000:b4e:b0:39e:cc5e:147 with SMTP id ffacd0b85a97d-3a0894a1aa8mr3065452f8f.55.1745932926674; Tue, 29 Apr 2025 06:22:06 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a073ca5219sm13729371f8f.27.2025.04.29.06.22.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Apr 2025 06:22:06 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Edgar E . Iglesias" Subject: [PATCH v2 4/7] target/arm: Present AArch64 gdbstub based on ARM_FEATURE_AARCH64 Date: Tue, 29 Apr 2025 14:21:57 +0100 Message-ID: <20250429132200.605611-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250429132200.605611-1-peter.maydell@linaro.org> References: <20250429132200.605611-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Currently we provide an AArch64 gdbstub for CPUs which are TYPE_AARCH64_CPU, and an AArch32 gdbstub for those which are only TYPE_ARM_CPU. This mostly does the right thing, except in the corner case of KVM with -cpu host,aarch64=off. That produces a CPU which is TYPE_AARCH64_CPU but which has ARM_FEATURE_AARCH64 removed and which to the guest is in AArch32 mode. Now we have moved all the handling of AArch64-vs-AArch32 gdbstub behaviour into TYPE_ARM_CPU we can change the condition we use for whether to select the AArch64 gdbstub to look at ARM_FEATURE_AARCH64. This will mean that we now correctly provide an AArch32 gdbstub for aarch64=off CPUs. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/internals.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 4d3d84ffebd..f1c06a3fd89 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1831,7 +1831,7 @@ void aarch64_add_sme_properties(Object *obj); /* Return true if the gdbstub is presenting an AArch64 CPU */ static inline bool arm_gdbstub_is_aarch64(ARMCPU *cpu) { - return object_dynamic_cast(OBJECT(cpu), TYPE_AARCH64_CPU); + return arm_feature(&cpu->env, ARM_FEATURE_AARCH64); } /* Read the CONTROL register as the MRS instruction would. */