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[v4,128/163] target/ppc: Use tcg_gen_addcio_tl for ADD and SUBF

Message ID 20250415192515.232910-129-richard.henderson@linaro.org
State New
Headers show
Series tcg: Convert to TCGOutOp structures | expand

Commit Message

Richard Henderson April 15, 2025, 7:24 p.m. UTC 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/ppc/translate.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

Comments

Nicholas Piggin April 16, 2025, 2:08 p.m. UTC | #1 
On Wed Apr 16, 2025 at 5:24 AM AEST, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Nice op, looks good to me.

Reviewed-by: Nicholas Piggin <npiggin@gmail.com>

> ---
>  target/ppc/translate.c | 11 ++++-------
>  1 file changed, 4 insertions(+), 7 deletions(-)
>
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index a52cbc869a..e082d50977 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -1745,11 +1745,10 @@ static inline void gen_op_arith_add(DisasContext *ctx, TCGv ret, TCGv arg1,
>                  tcg_gen_mov_tl(ca32, ca);
>              }
>          } else {
> -            TCGv zero = tcg_constant_tl(0);
>              if (add_ca) {
> -                tcg_gen_add2_tl(t0, ca, arg1, zero, ca, zero);
> -                tcg_gen_add2_tl(t0, ca, t0, ca, arg2, zero);
> +                tcg_gen_addcio_tl(t0, ca, arg1, arg2, ca);
>              } else {
> +                TCGv zero = tcg_constant_tl(0);
>                  tcg_gen_add2_tl(t0, ca, arg1, zero, arg2, zero);
>              }
>              gen_op_arith_compute_ca32(ctx, t0, arg1, arg2, ca32, 0);
> @@ -1948,11 +1947,9 @@ static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1,
>                  tcg_gen_mov_tl(cpu_ca32, cpu_ca);
>              }
>          } else if (add_ca) {
> -            TCGv zero, inv1 = tcg_temp_new();
> +            TCGv inv1 = tcg_temp_new();
>              tcg_gen_not_tl(inv1, arg1);
> -            zero = tcg_constant_tl(0);
> -            tcg_gen_add2_tl(t0, cpu_ca, arg2, zero, cpu_ca, zero);
> -            tcg_gen_add2_tl(t0, cpu_ca, t0, cpu_ca, inv1, zero);
> +            tcg_gen_addcio_tl(t0, cpu_ca, arg2, inv1, cpu_ca);
>              gen_op_arith_compute_ca32(ctx, t0, inv1, arg2, cpu_ca32, 0);
>          } else {
>              tcg_gen_setcond_tl(TCG_COND_GEU, cpu_ca, arg2, arg1);
Pierrick Bouvier April 16, 2025, 7:08 p.m. UTC | #2 
On 4/15/25 12:24, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/ppc/translate.c | 11 ++++-------
>   1 file changed, 4 insertions(+), 7 deletions(-)
> 
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index a52cbc869a..e082d50977 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -1745,11 +1745,10 @@ static inline void gen_op_arith_add(DisasContext *ctx, TCGv ret, TCGv arg1,
>                   tcg_gen_mov_tl(ca32, ca);
>               }
>           } else {
> -            TCGv zero = tcg_constant_tl(0);
>               if (add_ca) {
> -                tcg_gen_add2_tl(t0, ca, arg1, zero, ca, zero);
> -                tcg_gen_add2_tl(t0, ca, t0, ca, arg2, zero);
> +                tcg_gen_addcio_tl(t0, ca, arg1, arg2, ca);
>               } else {
> +                TCGv zero = tcg_constant_tl(0);
>                   tcg_gen_add2_tl(t0, ca, arg1, zero, arg2, zero);
>               }
>               gen_op_arith_compute_ca32(ctx, t0, arg1, arg2, ca32, 0);
> @@ -1948,11 +1947,9 @@ static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1,
>                   tcg_gen_mov_tl(cpu_ca32, cpu_ca);
>               }
>           } else if (add_ca) {
> -            TCGv zero, inv1 = tcg_temp_new();
> +            TCGv inv1 = tcg_temp_new();
>               tcg_gen_not_tl(inv1, arg1);
> -            zero = tcg_constant_tl(0);
> -            tcg_gen_add2_tl(t0, cpu_ca, arg2, zero, cpu_ca, zero);
> -            tcg_gen_add2_tl(t0, cpu_ca, t0, cpu_ca, inv1, zero);
> +            tcg_gen_addcio_tl(t0, cpu_ca, arg2, inv1, cpu_ca);
>               gen_op_arith_compute_ca32(ctx, t0, inv1, arg2, cpu_ca32, 0);
>           } else {
>               tcg_gen_setcond_tl(TCG_COND_GEU, cpu_ca, arg2, arg1);

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
diff mbox series

Patch

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index a52cbc869a..e082d50977 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -1745,11 +1745,10 @@  static inline void gen_op_arith_add(DisasContext *ctx, TCGv ret, TCGv arg1,
                 tcg_gen_mov_tl(ca32, ca);
             }
         } else {
-            TCGv zero = tcg_constant_tl(0);
             if (add_ca) {
-                tcg_gen_add2_tl(t0, ca, arg1, zero, ca, zero);
-                tcg_gen_add2_tl(t0, ca, t0, ca, arg2, zero);
+                tcg_gen_addcio_tl(t0, ca, arg1, arg2, ca);
             } else {
+                TCGv zero = tcg_constant_tl(0);
                 tcg_gen_add2_tl(t0, ca, arg1, zero, arg2, zero);
             }
             gen_op_arith_compute_ca32(ctx, t0, arg1, arg2, ca32, 0);
@@ -1948,11 +1947,9 @@  static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1,
                 tcg_gen_mov_tl(cpu_ca32, cpu_ca);
             }
         } else if (add_ca) {
-            TCGv zero, inv1 = tcg_temp_new();
+            TCGv inv1 = tcg_temp_new();
             tcg_gen_not_tl(inv1, arg1);
-            zero = tcg_constant_tl(0);
-            tcg_gen_add2_tl(t0, cpu_ca, arg2, zero, cpu_ca, zero);
-            tcg_gen_add2_tl(t0, cpu_ca, t0, cpu_ca, inv1, zero);
+            tcg_gen_addcio_tl(t0, cpu_ca, arg2, inv1, cpu_ca);
             gen_op_arith_compute_ca32(ctx, t0, inv1, arg2, cpu_ca32, 0);
         } else {
             tcg_gen_setcond_tl(TCG_COND_GEU, cpu_ca, arg2, arg1);