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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec1795630sm35331985e9.29.2025.04.03.17.02.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 17:02:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Pierrick Bouvier , Richard Henderson , Markus Armbruster Subject: [RFC PATCH-for-10.1 35/39] hw/arm/virt: Replace TARGET_AARCH64 -> target_long_bits() Date: Fri, 4 Apr 2025 01:58:17 +0200 Message-ID: <20250403235821.9909-36-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403235821.9909-1-philmd@linaro.org> References: <20250403235821.9909-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Replace the target-specific TARGET_AARCH64 definition by a call to the generic target_long_bits() helper. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/virt.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index e241e71e1c3..a020f1bd581 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -3133,25 +3133,25 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) #ifdef CONFIG_TCG machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a7")); machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a15")); -#ifdef TARGET_AARCH64 - machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a35")); - machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a55")); - machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a72")); - machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a76")); - machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a710")); - machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("a64fx")); - machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-n1")); - machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-v1")); - machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-n2")); -#endif /* TARGET_AARCH64 */ + if (target_long_bits() == 64) { + machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a35")); + machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a55")); + machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a72")); + machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a76")); + machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a710")); + machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("a64fx")); + machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-n1")); + machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-v1")); + machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-n2")); + } #endif /* CONFIG_TCG */ -#ifdef TARGET_AARCH64 - machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a53")); - machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a57")); + if (target_long_bits() == 64) { + machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a53")); + machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a57")); #if defined(CONFIG_KVM) || defined(CONFIG_HVF) - machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("host")); + machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("host")); #endif /* CONFIG_KVM || CONFIG_HVF */ -#endif /* TARGET_AARCH64 */ + } machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("max")); mc->init = machvirt_init;