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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c3020da49sm2905632f8f.80.2025.04.03.16.58.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:58:31 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Pierrick Bouvier , Richard Henderson , Markus Armbruster Subject: [RFC PATCH-for-10.1 01/39] target/arm: Implement per-binary TargetInfo structures Date: Fri, 4 Apr 2025 01:57:43 +0200 Message-ID: <20250403235821.9909-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403235821.9909-1-philmd@linaro.org> References: <20250403235821.9909-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- meson.build | 1 + target/arm/target_info-aarch64-softmmu.c | 24 ++++++++++++++++++++++++ target/arm/target_info-arm-softmmu.c | 24 ++++++++++++++++++++++++ target/arm/meson.build | 5 +++++ 4 files changed, 54 insertions(+) create mode 100644 target/arm/target_info-aarch64-softmmu.c create mode 100644 target/arm/target_info-arm-softmmu.c diff --git a/meson.build b/meson.build index b93253166c8..9df662932a4 100644 --- a/meson.build +++ b/meson.build @@ -3263,6 +3263,7 @@ host_kconfig = \ ignored = [ 'TARGET_XML_FILES', 'TARGET_ABI_DIR', 'TARGET_ARCH' ] target_info = [ + 'arm-softmmu', 'aarch64-softmmu', ] default_targets = 'CONFIG_DEFAULT_TARGETS' in config_host diff --git a/target/arm/target_info-aarch64-softmmu.c b/target/arm/target_info-aarch64-softmmu.c new file mode 100644 index 00000000000..002aac642f8 --- /dev/null +++ b/target/arm/target_info-aarch64-softmmu.c @@ -0,0 +1,24 @@ +/* + * QEMU legacy binary helpers + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/target_info-impl.h" +#include "cpu-qom.h" + +static const BinaryTargetInfo target_info_aarch64_system = { + .name = "aarch64", + .system_arch = SYS_EMU_TARGET_AARCH64, + .endianness = ENDIAN_MODE_LITTLE, + .long_bits = 64, + .cpu_resolving_type = TYPE_ARM_CPU, +}; + +const BinaryTargetInfo *target_info(void) +{ + return &target_info_aarch64_system; +} diff --git a/target/arm/target_info-arm-softmmu.c b/target/arm/target_info-arm-softmmu.c new file mode 100644 index 00000000000..24b68b1ad8b --- /dev/null +++ b/target/arm/target_info-arm-softmmu.c @@ -0,0 +1,24 @@ +/* + * QEMU legacy binary helpers + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/target_info-impl.h" +#include "cpu-qom.h" + +static const BinaryTargetInfo target_info_arm_system = { + .name = "arm", + .system_arch = SYS_EMU_TARGET_ARM, + .endianness = ENDIAN_MODE_LITTLE, + .long_bits = 32, + .cpu_resolving_type = TYPE_ARM_CPU, +}; + +const BinaryTargetInfo *target_info(void) +{ + return &target_info_arm_system; +} diff --git a/target/arm/meson.build b/target/arm/meson.build index 3065081d241..706c49c1b2a 100644 --- a/target/arm/meson.build +++ b/target/arm/meson.build @@ -25,6 +25,11 @@ arm_system_ss.add(files( 'machine.c', 'ptw.c', )) +arm_system_ss.add(when: 'TARGET_AARCH64', if_true: files( + 'target_info-aarch64-softmmu.c', +), if_false: files( + 'target_info-arm-softmmu.c', +)) arm_user_ss = ss.source_set()