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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3997f9b5b8dsm11845800f8f.59.2025.03.24.11.58.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 24 Mar 2025 11:58:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , qemu-s390x@nongnu.org, Daniel Henrique Barboza , David Hildenbrand , Christian Borntraeger , Artyom Tarasenko , Eric Farman , Paolo Bonzini , Halil Pasic , Zhao Liu , Eduardo Habkost , Yanan Wang , Richard Henderson , qemu-ppc@nongnu.org, Nicholas Piggin , Ilya Leoshkevich , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , Marcel Apfelbaum Subject: [PATCH v3 1/7] cpus: Introduce CPUClass::list_cpus() callback Date: Mon, 24 Mar 2025 19:58:31 +0100 Message-ID: <20250324185837.46506-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250324185837.46506-1-philmd@linaro.org> References: <20250324185837.46506-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Some targets define cpu_list to a method listing their CPUs on stdout. In order to make list_cpus() generic, introduce the CPUClass::list_cpus() callback. When no callback is registered, list_cpus() defaults to the cpu_list definition. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson Reviewed-by: Zhao Liu --- include/hw/core/cpu.h | 2 ++ cpu-target.c | 8 +++++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 5d11d26556a..ccfcd3eb3a6 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -102,6 +102,7 @@ struct SysemuCPUOps; * CPUClass: * @class_by_name: Callback to map -cpu command line model name to an * instantiatable CPU type. + * @list_cpus: list available CPU models and flags. * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. * @mmu_index: Callback for choosing softmmu mmu index; @@ -150,6 +151,7 @@ struct CPUClass { /*< public >*/ ObjectClass *(*class_by_name)(const char *cpu_model); + void (*list_cpus)(void); void (*parse_features)(const char *typename, char *str, Error **errp); int (*mmu_index)(CPUState *cpu, bool ifetch); diff --git a/cpu-target.c b/cpu-target.c index cae77374b38..5947ca31a0a 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -98,7 +98,13 @@ static void cpu_list(void) void list_cpus(void) { - cpu_list(); + CPUClass *cc = CPU_CLASS(object_class_by_name(CPU_RESOLVING_TYPE)); + + if (cc->list_cpus) { + cc->list_cpus(); + } else { + cpu_list(); + } } /* enable or disable single step mode. EXCP_DEBUG is returned by the