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Iglesias" , Markus Armbruster , Akihiko Odaki , qemu-ppc@nongnu.org, Richard Henderson , Thomas Huth , David Gibson , Daniel Henrique Barboza , =?utf-8?q?Daniel_P=2E_Berr?= =?utf-8?q?ang=C3=A9?= , Ilya Leoshkevich , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?C?= =?utf-8?q?=C3=A9dric_Le_Goater?= , Peter Maydell , qemu-s390x@nongnu.org, Wainer dos Santos Moschetta , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , David Hildenbrand , Pierrick Bouvier Subject: [PATCH v2 07/11] target/ppc: expand comment on FP/VMX/VSX access functions Date: Mon, 24 Mar 2025 10:21:38 +0000 Message-Id: <20250324102142.67022-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250324102142.67022-1-alex.bennee@linaro.org> References: <20250324102142.67022-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Mainly as an aid to myself getting confused too many bswaps deep into the code. Reviewed-by: Pierrick Bouvier Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- target/ppc/cpu.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index efab54a068..1e833ade04 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -2906,7 +2906,12 @@ static inline bool lsw_reg_in_range(int start, int nregs, int rx) (start + nregs > 32 && (rx >= start || rx < start + nregs - 32)); } -/* Accessors for FP, VMX and VSX registers */ +/* + * Access functions for FP, VMX and VSX registers + * + * The register is stored as a 128 bit host endian value so we need to + * take that into account when accessing smaller parts of it. + */ #if HOST_BIG_ENDIAN #define VsrB(i) u8[i] #define VsrSB(i) s8[i]