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Iglesias" , Markus Armbruster , Akihiko Odaki , qemu-ppc@nongnu.org, Richard Henderson , Thomas Huth , David Gibson , Daniel Henrique Barboza , =?utf-8?q?Daniel_P=2E_Berr?= =?utf-8?q?ang=C3=A9?= , Ilya Leoshkevich , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?C?= =?utf-8?q?=C3=A9dric_Le_Goater?= , Peter Maydell , qemu-s390x@nongnu.org, Wainer dos Santos Moschetta , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , David Hildenbrand , Pierrick Bouvier Subject: [PATCH v2 10/11] target/microblaze: convert gdbstub to new helper Date: Mon, 24 Mar 2025 10:21:41 +0000 Message-Id: <20250324102142.67022-11-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250324102142.67022-1-alex.bennee@linaro.org> References: <20250324102142.67022-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This is a pretty simple conversion given a single set of registers and an existing helper to probe endianess. Signed-off-by: Alex Bennée Reviewed-by: Pierrick Bouvier --- v2 - use mb_cpu_is_big_endian - use explicit MO_32 size - handle differing size of env->ear between user/system --- target/microblaze/gdbstub.c | 49 +++++++++++++++++-------------------- 1 file changed, 22 insertions(+), 27 deletions(-) diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c index d493681d38..dbaf7ecb9c 100644 --- a/target/microblaze/gdbstub.c +++ b/target/microblaze/gdbstub.c @@ -19,7 +19,7 @@ */ #include "qemu/osdep.h" #include "cpu.h" -#include "gdbstub/helpers.h" +#include "gdbstub/registers.h" /* * GDB expects SREGs in the following order: @@ -50,62 +50,57 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); CPUMBState *env = &cpu->env; - uint32_t val; + MemOp mo = mb_cpu_is_big_endian(cs) ? MO_BE : MO_LE; + uint32_t msr; switch (n) { case 1 ... 31: - val = env->regs[n]; - break; + return gdb_get_reg32_value(mo | MO_32, mem_buf, &env->regs[n]); case GDB_PC: - val = env->pc; - break; + return gdb_get_reg32_value(mo | MO_32, mem_buf, &env->pc); case GDB_MSR: - val = mb_cpu_read_msr(env); - break; + msr = mb_cpu_read_msr(env); + return gdb_get_reg32_value(mo | MO_32, mem_buf, &msr); case GDB_EAR: - val = env->ear; - break; +#if TARGET_LONG_BITS == 64 + return gdb_get_reg64_value(mo | MO_64, mem_buf, &env->ear); +#else + return gdb_get_reg32_value(mo | MO_32, mem_buf, &env->ear); +#endif case GDB_ESR: - val = env->esr; - break; + return gdb_get_reg32_value(mo | MO_32, mem_buf, &env->esr); case GDB_FSR: - val = env->fsr; - break; + return gdb_get_reg32_value(mo | MO_32, mem_buf, &env->fsr); case GDB_BTR: - val = env->btr; - break; + return gdb_get_reg32_value(mo | MO_32, mem_buf, &env->btr); case GDB_PVR0 ... GDB_PVR11: /* PVR12 is intentionally skipped */ - val = cpu->cfg.pvr_regs[n - GDB_PVR0]; - break; + return gdb_get_reg32_value(mo | MO_32, mem_buf, + &cpu->cfg.pvr_regs[n - GDB_PVR0]); case GDB_EDR: - val = env->edr; - break; + return gdb_get_reg32_value(mo | MO_32, mem_buf, &env->edr); default: /* Other SRegs aren't modeled, so report a value of 0 */ - val = 0; - break; + return 0; } - return gdb_get_reg32(mem_buf, val); } int mb_cpu_gdb_read_stack_protect(CPUState *cs, GByteArray *mem_buf, int n) { MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); CPUMBState *env = &cpu->env; - uint32_t val; + MemOp mo = TARGET_BIG_ENDIAN ? MO_BEUL : MO_LEUL; switch (n) { case GDB_SP_SHL: - val = env->slr; + return gdb_get_reg32_value(mo, mem_buf, &env->slr); break; case GDB_SP_SHR: - val = env->shr; + return gdb_get_reg32_value(mo, mem_buf, &env->shr); break; default: return 0; } - return gdb_get_reg32(mem_buf, val); } int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)