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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-395cb40cdd0sm21104325f8f.77.2025.03.19.06.46.05 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 19 Mar 2025 06:46:05 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Anton Johansson , Peter Maydell , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH-for-10.1 11/12] tcg: Unify tcg_gen_insn_start() to handle 0 or 2 arguments Date: Wed, 19 Mar 2025 14:45:05 +0100 Message-ID: <20250319134507.45045-12-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250319134507.45045-1-philmd@linaro.org> References: <20250319134507.45045-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Merge the tcg_gen_insn_start() definition using no extra word with the definition using 2, using a1=0 and a2=0 in callers. Signed-off-by: Philippe Mathieu-Daudé --- include/tcg/tcg-op.h | 15 +++------------ target/alpha/translate.c | 4 ++-- target/avr/translate.c | 2 +- target/loongarch/tcg/translate.c | 2 +- target/ppc/translate.c | 2 +- target/rx/translate.c | 2 +- target/tricore/translate.c | 2 +- target/xtensa/translate.c | 2 +- 8 files changed, 11 insertions(+), 20 deletions(-) diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h index df234d4e1e0..cf177a1fd3b 100644 --- a/include/tcg/tcg-op.h +++ b/include/tcg/tcg-op.h @@ -22,16 +22,6 @@ # error #endif -#if TARGET_INSN_START_EXTRA_WORDS == 0 -static inline void tcg_gen_insn_start(uint64_t pc) -{ - unsigned insn_start_words = tcg_ctx->insn_start_words; - TCGOp *op = tcg_emit_op(INDEX_op_insn_start, - insn_start_words * 64 / TCG_TARGET_REG_BITS); - - tcg_set_insn_start_param(op, 0, pc); -} -#elif TARGET_INSN_START_EXTRA_WORDS >= 1 static inline void tcg_gen_insn_start(uint64_t pc, uint64_t a1, uint64_t a2) { unsigned insn_start_words = tcg_ctx->insn_start_words; @@ -39,12 +29,13 @@ static inline void tcg_gen_insn_start(uint64_t pc, uint64_t a1, uint64_t a2) insn_start_words * 64 / TCG_TARGET_REG_BITS); tcg_set_insn_start_param(op, 0, pc); - tcg_set_insn_start_param(op, 1, a1); + if (insn_start_words > 1) { + tcg_set_insn_start_param(op, 1, a1); + } if (insn_start_words > 2) { tcg_set_insn_start_param(op, 2, a2); } } -#endif #if TARGET_LONG_BITS == 32 typedef TCGv_i32 TCGv; diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 2156c022146..6586ad0a69a 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -2905,9 +2905,9 @@ static void alpha_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) DisasContext *ctx = container_of(dcbase, DisasContext, base); if (ctx->pcrel) { - tcg_gen_insn_start(dcbase->pc_next & ~TARGET_PAGE_MASK); + tcg_gen_insn_start(dcbase->pc_next & ~TARGET_PAGE_MASK, 0, 0); } else { - tcg_gen_insn_start(dcbase->pc_next); + tcg_gen_insn_start(dcbase->pc_next, 0, 0); } } diff --git a/target/avr/translate.c b/target/avr/translate.c index 4ab71d8138b..c4f1a446467 100644 --- a/target/avr/translate.c +++ b/target/avr/translate.c @@ -2686,7 +2686,7 @@ static void avr_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx = container_of(dcbase, DisasContext, base); - tcg_gen_insn_start(ctx->npc); + tcg_gen_insn_start(ctx->npc, 0, 0); } static void avr_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) diff --git a/target/loongarch/tcg/translate.c b/target/loongarch/tcg/translate.c index e59e4ed25b1..ee359e804af 100644 --- a/target/loongarch/tcg/translate.c +++ b/target/loongarch/tcg/translate.c @@ -158,7 +158,7 @@ static void loongarch_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx = container_of(dcbase, DisasContext, base); - tcg_gen_insn_start(ctx->base.pc_next); + tcg_gen_insn_start(ctx->base.pc_next, 0, 0); } /* diff --git a/target/ppc/translate.c b/target/ppc/translate.c index a52cbc869ae..70458526282 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -6558,7 +6558,7 @@ static void ppc_tr_tb_start(DisasContextBase *db, CPUState *cs) static void ppc_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) { - tcg_gen_insn_start(dcbase->pc_next); + tcg_gen_insn_start(dcbase->pc_next, 0, 0); } static bool is_prefix_insn(DisasContext *ctx, uint32_t insn) diff --git a/target/rx/translate.c b/target/rx/translate.c index bbda703be86..16a865bd40f 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -2210,7 +2210,7 @@ static void rx_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx = container_of(dcbase, DisasContext, base); - tcg_gen_insn_start(ctx->base.pc_next); + tcg_gen_insn_start(ctx->base.pc_next, 0, 0); } static void rx_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 6819b776686..636137a5f73 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -8376,7 +8376,7 @@ static void tricore_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *ctx = container_of(dcbase, DisasContext, base); - tcg_gen_insn_start(ctx->base.pc_next); + tcg_gen_insn_start(ctx->base.pc_next, 0, 0); } static bool insn_crosses_page(CPUTriCoreState *env, DisasContext *ctx) diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 4f02cefde34..888752f2279 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -1159,7 +1159,7 @@ static void xtensa_tr_tb_start(DisasContextBase *dcbase, CPUState *cpu) static void xtensa_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) { - tcg_gen_insn_start(dcbase->pc_next); + tcg_gen_insn_start(dcbase->pc_next, 0, 0); } static void xtensa_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)