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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3912c019557sm9889830f8f.50.2025.03.08.11.02.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sat, 08 Mar 2025 11:02:46 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: BALATON Zoltan , qemu-devel@nongnu.org Cc: Bernhard Beschow , Peter Maydell , qemu-ppc@nongnu.org, Andrey Smirnov , Jean-Christophe Dubois , Bin Meng , qemu-arm@nongnu.org, qemu-block@nongnu.org, Guenter Roeck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 03/12] hw/sd/sdhci: Make quirks a class property Date: Sat, 8 Mar 2025 20:02:21 +0100 Message-ID: <20250308190230.7508-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250308190230.7508-1-philmd@linaro.org> References: <20250308190230.7508-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All TYPE_IMX_USDHC instances use the quirk: move it to the class layer. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/sd/sdhci.h | 3 ++- hw/sd/sdhci.c | 15 +++++++++++++-- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index c4b20db3877..0616ce3aa59 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -95,7 +95,6 @@ struct SDHCIState { /* Configurable properties */ bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */ - uint32_t quirks; uint8_t endianness; uint8_t sd_spec_version; uint8_t uhs_mode; @@ -112,6 +111,8 @@ typedef struct SDHCIClass { PCIDeviceClass pci_parent_class; SysBusDeviceClass sbd_parent_class; }; + + uint32_t quirks; } SDHCIClass; /* diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 4917a9b3632..2b7eb11a14a 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -345,6 +345,8 @@ static void sdhci_send_command(SDHCIState *s) rlen = sdbus_do_command(&s->sdbus, &request, response); if (s->cmdreg & SDHC_CMD_RESPONSE) { + SDHCIClass *sc = SYSBUS_SDHCI_GET_CLASS(s); + if (rlen == 4) { s->rspreg[0] = ldl_be_p(response); s->rspreg[1] = s->rspreg[2] = s->rspreg[3] = 0; @@ -366,7 +368,7 @@ static void sdhci_send_command(SDHCIState *s) } } - if (!(s->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) && + if (!(sc->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) && (s->norintstsen & SDHC_NISEN_TRSCMP) && (s->cmdreg & SDHC_CMD_RESPONSE) == SDHC_CMD_RSP_WITH_BUSY) { s->norintsts |= SDHC_NIS_TRSCMP; @@ -1886,7 +1888,15 @@ static void imx_usdhc_init(Object *obj) SDHCIState *s = SYSBUS_SDHCI(obj); s->io_ops = &usdhc_mmio_ops; - s->quirks = SDHCI_QUIRK_NO_BUSY_IRQ; +} + +static void imx_usdhc_class_init(ObjectClass *oc, void *data) +{ + SDHCIClass *sc = SYSBUS_SDHCI_CLASS(oc); + + sc->quirks = SDHCI_QUIRK_NO_BUSY_IRQ; + + sdhci_common_class_init(oc, data); } /* --- qdev Samsung s3c --- */ @@ -1967,6 +1977,7 @@ static const TypeInfo sdhci_types[] = { .name = TYPE_IMX_USDHC, .parent = TYPE_SYSBUS_SDHCI, .instance_init = imx_usdhc_init, + .class_init = imx_usdhc_class_init, }, { .name = TYPE_S3C_SDHCI,