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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e485dbe7sm21577111f8f.93.2025.03.05.07.40.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 05 Mar 2025 07:40:19 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Paolo Bonzini , Richard Henderson , Pierrick Bouvier , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Subject: [RFC PATCH 10/18] qemu: Introduce legacy_binary_is_big_endian() helper Date: Wed, 5 Mar 2025 16:39:20 +0100 Message-ID: <20250305153929.43687-11-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305153929.43687-1-philmd@linaro.org> References: <20250305153929.43687-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Introduce legacy_binary_endianness() to return the endianness of a legacy binary, and legacy_binary_is_big_endian() being equivalent of compile time TARGET_BIG_ENDIAN definition. Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/legacy_binary_info.h | 8 ++++++ legacy_binary_info.c | 43 +++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+) diff --git a/include/qemu/legacy_binary_info.h b/include/qemu/legacy_binary_info.h index 2d42e852b7a..18886a05402 100644 --- a/include/qemu/legacy_binary_info.h +++ b/include/qemu/legacy_binary_info.h @@ -9,9 +9,17 @@ #ifndef QEMU_LEGACY_BINARY_INFO_H #define QEMU_LEGACY_BINARY_INFO_H +#include "qapi/qapi-types-common.h" + void legacy_binary_info_init(const char *argv0); /* Return runtime equivalent of TARGET_LONG_BITS == 64 check */ bool legacy_binary_is_64bit(void); +/* Return runtime equivalent of TARGET_BIG_ENDIAN definition */ +bool legacy_binary_is_big_endian(void); + +/* Return endianness of legacy binary */ +EndianMode legacy_binary_endianness(void); + #endif diff --git a/legacy_binary_info.c b/legacy_binary_info.c index be50d3f50ea..c9a8e99699e 100644 --- a/legacy_binary_info.c +++ b/legacy_binary_info.c @@ -9,10 +9,12 @@ #include "qemu/osdep.h" #include "qemu/arch_info.h" #include "qemu/legacy_binary_info.h" +#include "qapi/qapi-types-common.h" typedef struct LegacyBinaryInfo { const char *binary_name; QemuArchBit arch_bit; + EndianMode endianness; unsigned long_bits; } LegacyBinaryInfo; @@ -21,146 +23,175 @@ static const LegacyBinaryInfo legacy_binary_infos[] = { { .binary_name = "qemu-system-aarch64", .arch_bit = QEMU_ARCH_BIT_ARM, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 64, }, { .binary_name = "qemu-system-alpha", .arch_bit = QEMU_ARCH_BIT_ALPHA, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 64, }, { .binary_name = "qemu-system-arm", .arch_bit = QEMU_ARCH_BIT_ARM, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 32, }, { .binary_name = "qemu-system-avr", .arch_bit = QEMU_ARCH_BIT_AVR, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 32, }, { .binary_name = "qemu-system-hppa", .arch_bit = QEMU_ARCH_BIT_HPPA, + .endianness = ENDIAN_MODE_BIG, .long_bits = 64, }, { .binary_name = "qemu-system-i386", .arch_bit = QEMU_ARCH_BIT_I386, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 32, }, { .binary_name = "qemu-system-loongarch64", .arch_bit = QEMU_ARCH_BIT_LOONGARCH, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 64, }, { .binary_name = "qemu-system-m68k", .arch_bit = QEMU_ARCH_BIT_M68K, + .endianness = ENDIAN_MODE_BIG, .long_bits = 32, }, { .binary_name = "qemu-system-microblaze", .arch_bit = QEMU_ARCH_BIT_MICROBLAZE, + .endianness = ENDIAN_MODE_BIG, .long_bits = 64, }, { .binary_name = "qemu-system-microblazeel", .arch_bit = QEMU_ARCH_BIT_MICROBLAZE, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 64, }, { .binary_name = "qemu-system-mips", .arch_bit = QEMU_ARCH_BIT_MIPS, + .endianness = ENDIAN_MODE_BIG, .long_bits = 64, }, { .binary_name = "qemu-system-mips64", .arch_bit = QEMU_ARCH_BIT_MIPS, + .endianness = ENDIAN_MODE_BIG, .long_bits = 64, }, { .binary_name = "qemu-system-mips64el", .arch_bit = QEMU_ARCH_BIT_MIPS, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 64, }, { .binary_name = "qemu-system-mipsel", .arch_bit = QEMU_ARCH_BIT_MIPS, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 32, }, { .binary_name = "qemu-system-or1k", .arch_bit = QEMU_ARCH_BIT_OPENRISC, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 32, }, { .binary_name = "qemu-system-ppc", .arch_bit = QEMU_ARCH_BIT_PPC, + .endianness = ENDIAN_MODE_BIG, .long_bits = 32, }, { .binary_name = "qemu-system-ppc64", .arch_bit = QEMU_ARCH_BIT_PPC, + .endianness = ENDIAN_MODE_BIG, .long_bits = 64, }, { .binary_name = "qemu-system-riscv32", .arch_bit = QEMU_ARCH_BIT_RISCV, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 32, }, { .binary_name = "qemu-system-riscv64", .arch_bit = QEMU_ARCH_BIT_RISCV, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 64, }, { .binary_name = "qemu-system-rx", .arch_bit = QEMU_ARCH_BIT_RX, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 32, }, { .binary_name = "qemu-system-s390x", .arch_bit = QEMU_ARCH_BIT_S390X, + .endianness = ENDIAN_MODE_BIG, .long_bits = 64, }, { .binary_name = "qemu-system-sh4", .arch_bit = QEMU_ARCH_BIT_SH4, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 32, }, { .binary_name = "qemu-system-sh4eb", .arch_bit = QEMU_ARCH_BIT_SH4, + .endianness = ENDIAN_MODE_BIG, .long_bits = 32, }, { .binary_name = "qemu-system-sparc", .arch_bit = QEMU_ARCH_BIT_SPARC, + .endianness = ENDIAN_MODE_BIG, .long_bits = 32, }, { .binary_name = "qemu-system-sparc64", .arch_bit = QEMU_ARCH_BIT_SPARC, + .endianness = ENDIAN_MODE_BIG, .long_bits = 64, }, { .binary_name = "qemu-system-tricore", .arch_bit = QEMU_ARCH_BIT_TRICORE, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 32, }, { .binary_name = "qemu-system-x86_64", .arch_bit = QEMU_ARCH_BIT_I386, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 64, }, { .binary_name = "qemu-system-xtensa", .arch_bit = QEMU_ARCH_BIT_XTENSA, + .endianness = ENDIAN_MODE_LITTLE, .long_bits = 32, }, { .binary_name = "qemu-system-xtensaeb", .arch_bit = QEMU_ARCH_BIT_XTENSA, + .endianness = ENDIAN_MODE_BIG, .long_bits = 32, }, }; @@ -182,6 +213,7 @@ void legacy_binary_info_init(const char *argv0) for (size_t i = 0; i < ARRAY_SIZE(legacy_binary_infos); i++) { if (!strcmp(legacy_binary_infos[i].binary_name, binary_name)) { assert(legacy_binary_infos[i].long_bits); + assert(legacy_binary_infos[i].endianness != ENDIAN_MODE_UNSPECIFIED); current_index = i; return; } @@ -195,3 +227,14 @@ bool legacy_binary_is_64bit(void) assert(current_index != -1); return legacy_binary_infos[current_index].long_bits == 64; } + +EndianMode legacy_binary_endianness(void) +{ + assert(current_index != -1); + return legacy_binary_infos[current_index].endianness; +} + +bool legacy_binary_is_big_endian(void) +{ + return legacy_binary_endianness() == ENDIAN_MODE_BIG; +}