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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438e23deddcsm66098885e9.14.2025.01.31.13.07.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 31 Jan 2025 13:07:30 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Peter Maydell , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PULL 26/36] hw/sd/omap_mmc: Do a minimal conversion to QDev Date: Fri, 31 Jan 2025 22:05:09 +0100 Message-ID: <20250131210520.85874-27-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250131210520.85874-1-philmd@linaro.org> References: <20250131210520.85874-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Peter Maydell Do a minimal conversion of the omap_mmc device model to QDev. In this commit we do the bare minimum to produce a working device: * add the SysBusDevice parent_obj and the usual type boilerplate * omap_mmc_init() now returns a DeviceState* * reset is handled by sysbus reset, so the SoC reset function doesn't need to call omap_mmc_reset() any more * code that should obviously be in init/realize is moved there from omap_mmc_init() We leave various pieces of cleanup to later commits: * rationalizing 'struct omap_mmc_s *' to 'OMAPMMCState *' * using gpio lines rather than having omap_mmc_init() directly set s->irq, s->dma * switching away from the legacy SD API and instead having the SD card plugged into a bus Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20250128104519.3981448-2-peter.maydell@linaro.org> [PMD: Do not add omap_mmc_realize()] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/arm/omap.h | 15 +++++---- hw/arm/omap1.c | 1 - hw/sd/omap_mmc.c | 77 ++++++++++++++++++++++++++++++++++--------- 3 files changed, 70 insertions(+), 23 deletions(-) diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index 420ed1d5735..6339c5a581e 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -529,12 +529,13 @@ struct omap_lcd_panel_s *omap_lcdc_init(MemoryRegion *sysmem, omap_clk clk); /* omap_mmc.c */ -struct omap_mmc_s; -struct omap_mmc_s *omap_mmc_init(hwaddr base, - MemoryRegion *sysmem, - BlockBackend *blk, - qemu_irq irq, qemu_irq dma[], omap_clk clk); -void omap_mmc_reset(struct omap_mmc_s *s); +#define TYPE_OMAP_MMC "omap-mmc" +OBJECT_DECLARE_SIMPLE_TYPE(omap_mmc_s, OMAP_MMC) + +DeviceState *omap_mmc_init(hwaddr base, + MemoryRegion *sysmem, + BlockBackend *blk, + qemu_irq irq, qemu_irq dma[], omap_clk clk); /* omap_i2c.c */ I2CBus *omap_i2c_bus(DeviceState *omap_i2c); @@ -601,7 +602,7 @@ struct omap_mpu_state_s { /* MPU public TIPB peripherals */ struct omap_32khz_timer_s *os_timer; - struct omap_mmc_s *mmc; + DeviceState *mmc; struct omap_mpuio_s *mpuio; diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index f3a0ac40e48..ea07b9aa31e 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -3716,7 +3716,6 @@ static void omap1_mpu_reset(void *opaque) omap_uart_reset(mpu->uart[0]); omap_uart_reset(mpu->uart[1]); omap_uart_reset(mpu->uart[2]); - omap_mmc_reset(mpu->mmc); omap_mpuio_reset(mpu->mpuio); omap_uwire_reset(mpu->microwire); omap_pwl_reset(mpu->pwl); diff --git a/hw/sd/omap_mmc.c b/hw/sd/omap_mmc.c index 1d4e30e6b7b..fec2cfd4d66 100644 --- a/hw/sd/omap_mmc.c +++ b/hw/sd/omap_mmc.c @@ -21,11 +21,15 @@ #include "qemu/osdep.h" #include "qemu/log.h" +#include "qapi/error.h" #include "hw/irq.h" +#include "hw/sysbus.h" #include "hw/arm/omap.h" #include "hw/sd/sdcard_legacy.h" -struct omap_mmc_s { +typedef struct omap_mmc_s { + SysBusDevice parent_obj; + qemu_irq irq; qemu_irq *dma; qemu_irq coverswitch; @@ -66,7 +70,7 @@ struct omap_mmc_s { int cdet_enable; int cdet_state; qemu_irq cdet; -}; +} OMAPMMCState; static void omap_mmc_interrupts_update(struct omap_mmc_s *s) { @@ -297,7 +301,7 @@ static void omap_mmc_pseudo_reset(struct omap_mmc_s *host) host->fifo_len = 0; } -void omap_mmc_reset(struct omap_mmc_s *host) +static void omap_mmc_reset(struct omap_mmc_s *host) { host->last_cmd = 0; memset(host->rsp, 0, sizeof(host->rsp)); @@ -328,7 +332,9 @@ void omap_mmc_reset(struct omap_mmc_s *host) * into any bus, and we must reset it manually. When omap_mmc is * QOMified this must move into the QOM reset function. */ - device_cold_reset(DEVICE(host->card)); + if (host->card) { + device_cold_reset(DEVICE(host->card)); + } } static uint64_t omap_mmc_read(void *opaque, hwaddr offset, unsigned size) @@ -583,29 +589,70 @@ static const MemoryRegionOps omap_mmc_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -struct omap_mmc_s *omap_mmc_init(hwaddr base, - MemoryRegion *sysmem, - BlockBackend *blk, - qemu_irq irq, qemu_irq dma[], omap_clk clk) +DeviceState *omap_mmc_init(hwaddr base, + MemoryRegion *sysmem, + BlockBackend *blk, + qemu_irq irq, qemu_irq dma[], omap_clk clk) { - struct omap_mmc_s *s = g_new0(struct omap_mmc_s, 1); + DeviceState *dev; + OMAPMMCState *s; + + dev = qdev_new(TYPE_OMAP_MMC); + s = OMAP_MMC(dev); + sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal); s->irq = irq; s->dma = dma; s->clk = clk; - s->lines = 1; /* TODO: needs to be settable per-board */ - s->rev = 1; - memory_region_init_io(&s->iomem, NULL, &omap_mmc_ops, s, "omap.mmc", 0x800); - memory_region_add_subregion(sysmem, base, &s->iomem); + memory_region_add_subregion(sysmem, base, + sysbus_mmio_get_region(SYS_BUS_DEVICE(s), 0)); /* Instantiate the storage */ s->card = sd_init(blk, false); if (s->card == NULL) { exit(1); } + return dev; +} + +static void omap_mmc_reset_hold(Object *obj, ResetType type) +{ + OMAPMMCState *s = OMAP_MMC(obj); omap_mmc_reset(s); - - return s; } + +static void omap_mmc_initfn(Object *obj) +{ + OMAPMMCState *s = OMAP_MMC(obj); + + /* In theory these could be settable per-board */ + s->lines = 1; + s->rev = 1; + + memory_region_init_io(&s->iomem, obj, &omap_mmc_ops, s, "omap.mmc", 0x800); + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem); +} + +static void omap_mmc_class_init(ObjectClass *oc, void *data) +{ + ResettableClass *rc = RESETTABLE_CLASS(oc); + + rc->phases.hold = omap_mmc_reset_hold; +} + +static const TypeInfo omap_mmc_info = { + .name = TYPE_OMAP_MMC, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(OMAPMMCState), + .instance_init = omap_mmc_initfn, + .class_init = omap_mmc_class_init, +}; + +static void omap_mmc_register_types(void) +{ + type_register_static(&omap_mmc_info); +} + +type_init(omap_mmc_register_types)