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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438bd5732edsm169125225e9.36.2025.01.28.06.22.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 28 Jan 2025 06:22:03 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Peter Maydell , Yanan Wang , Eduardo Habkost , Harsh Prateek Bora , kvm@vger.kernel.org, Zhao Liu , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Markus Armbruster , Igor Mammedov , Marcel Apfelbaum , Peter Xu , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Paolo Bonzini , Richard Henderson Subject: [RFC PATCH 2/9] accel/tcg: Invalidate TB jump cache with global vCPU queue locked Date: Tue, 28 Jan 2025 15:21:45 +0100 Message-ID: <20250128142152.9889-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250128142152.9889-1-philmd@linaro.org> References: <20250128142152.9889-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Invalidate TB with global vCPU queue locked. See commit 4731f89b3b9 ("cpu: free cpu->tb_jmp_cache with RCU"): Fixes the appended use-after-free. The root cause is that during tb invalidation we use CPU_FOREACH, and therefore to safely free a vCPU we must wait for an RCU grace period to elapse. Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/tb-maint.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 3f1bebf6ab5..64471af439d 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -891,6 +891,8 @@ static void tb_jmp_cache_inval_tb(TranslationBlock *tb) } else { uint32_t h = tb_jmp_cache_hash_func(tb->pc); + QEMU_LOCK_GUARD(&qemu_cpu_list_lock); + CPU_FOREACH(cpu) { CPUJumpCache *jc = cpu->tb_jmp_cache;