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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c2a188689sm10807831f8f.48.2025.01.27.03.55.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 27 Jan 2025 03:55:10 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Paolo Bonzini , qemu-riscv@nongnu.org, Peter Maydell , Richard Henderson , Thomas Huth , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH 09/10] target/xtensa: Set disassemble_info::endian value in disas_set_info() Date: Mon, 27 Jan 2025 12:54:25 +0100 Message-ID: <20250127115426.51355-10-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250127115426.51355-1-philmd@linaro.org> References: <20250127115426.51355-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- target/xtensa/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index efbfe73fcfb..bc170dbb5cc 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -159,6 +159,11 @@ static void xtensa_cpu_disas_set_info(CPUState *cs, disassemble_info *info) info->private_data = cpu->env.config->isa; info->print_insn = print_insn_xtensa; +#if TARGET_BIG_ENDIAN + info->endian = BFD_ENDIAN_BIG; +#else + info->endian = BFD_ENDIAN_LITTLE; +#endif } static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)