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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf322aab8sm13695067f8f.57.2025.01.21.06.25.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:25:57 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 28/28] cpus: Remove CPUClass::has_work() handler Date: Tue, 21 Jan 2025 15:23:41 +0100 Message-ID: <20250121142341.17001-29-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All handlers have been converted to SysemuCPUOps::has_work(). Remove CPUClass::has_work along with cpu_common_has_work() and simplify cpu_has_work(), asserting SysemuCPUOps::has_work is always registered. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 2 -- hw/core/cpu-common.c | 6 ------ hw/core/cpu-system.c | 8 ++------ 3 files changed, 2 insertions(+), 14 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index d64c823e768..2bcad4b16bf 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -104,7 +104,6 @@ struct SysemuCPUOps; * instantiatable CPU type. * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. - * @has_work: Callback for checking if there is work to do. * @mmu_index: Callback for choosing softmmu mmu index; * may be used internally by memory_rw_debug without TCG. * @memory_rw_debug: Callback for GDB memory access. @@ -151,7 +150,6 @@ struct CPUClass { ObjectClass *(*class_by_name)(const char *cpu_model); void (*parse_features)(const char *typename, char *str, Error **errp); - bool (*has_work)(CPUState *cpu); int (*mmu_index)(CPUState *cpu, bool ifetch); int (*memory_rw_debug)(CPUState *cpu, vaddr addr, uint8_t *buf, int len, bool is_write); diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 886aa793c04..c933de1416c 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -134,11 +134,6 @@ static void cpu_common_reset_hold(Object *obj, ResetType type) cpu_exec_reset_hold(cpu); } -static bool cpu_common_has_work(CPUState *cs) -{ - return false; -} - ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) { ObjectClass *oc; @@ -304,7 +299,6 @@ static void cpu_common_class_init(ObjectClass *klass, void *data) k->parse_features = cpu_common_parse_features; k->get_arch_id = cpu_common_get_arch_id; - k->has_work = cpu_common_has_work; k->gdb_read_register = cpu_common_gdb_read_register; k->gdb_write_register = cpu_common_gdb_write_register; set_bit(DEVICE_CATEGORY_CPU, dc->categories); diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c index 7b16bda2250..7f287984aa6 100644 --- a/hw/core/cpu-system.c +++ b/hw/core/cpu-system.c @@ -25,12 +25,8 @@ bool cpu_has_work(CPUState *cpu) { - if (cpu->cc->sysemu_ops->has_work) { - return cpu->cc->sysemu_ops->has_work(cpu); - } - - g_assert(cpu->cc->has_work); - return cpu->cc->has_work(cpu); + g_assert(cpu->cc->sysemu_ops->has_work); + return cpu->cc->sysemu_ops->has_work(cpu); } bool cpu_paging_enabled(const CPUState *cpu)