From patchwork Fri Jan 17 18:24:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 858260 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:cc8:b0:385:e875:8a9e with SMTP id dq8csp845037wrb; Fri, 17 Jan 2025 10:33:20 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUGpmhgbLkgsU3pgFnPQkJLkBpZ5N20JTufxpXA+m+AujPtsKjoO0RRPMROlGT9+rIM4AQzBQ==@linaro.org X-Google-Smtp-Source: AGHT+IFbqdyA4sNbmPPq7q/GB/O7xZPQ+xpqUj+NsRD9wtNIrxG2kLS70avH8BXcxeshzn3tpdkL X-Received: by 2002:a05:6102:290d:b0:4b2:cc92:169d with SMTP id ada2fe7eead31-4b690b71af5mr3525977137.4.1737138800038; Fri, 17 Jan 2025 10:33:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737138800; cv=none; d=google.com; s=arc-20240605; b=WwcQIOuWEf8UB2cjgtoxN9mc/EyAhWlF8kUrc2j5Bd7k7CKDzXII2dm4O5ONBEE7Ez BXB11nlzl231xA5lgyVArrRrpxesd4WwQhl6bawWdBEu+5cEteOGEAMTT4rXiB1OcUW/ l1iqaw1D2D1dg522N4K6y7yxBzA67MNGv/pWPfNs/nfa26tDHTvcgFQTwpJkuE0oha0u jxMbs7e2dGkWWLUStssm/ZvxnTi8j18AjN+lXqXxLktFwKwuopzSuxqMYNcFzn7cdPxc plt7ylR23JpsmV9/o7tuzN0YWdiAiLPrk1gwsxPW4yda3yc/6hBCKLiZiQujBHlWN8eQ hVXA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wWOubo1yw/jMK9n7npaDQ/kdBR0LHc4+hHuxEbmZxkw=; fh=kQadAhxV42GJ3cd2VUw1RyURv/zJQGvmUdF7iLEVTtc=; b=T9StjlXIKHW/GQCrg9Uo/53xLaCq4iNwhvegarm8FBrZGNFmTeeXlg35Jo6XfBzv22 MWNRnDcOXJJeqBpgh3hJXYiUCfHMvGmUmOEka03tLPW3tLruG6ICa8LjohUpLbzB95QJ 88ILQAftIIgr60y/44kmBQxs9GVeXsV5xC5Vnw60IXx/ipJ8zI5bnl9aqARDjEyCcNnK oKuhu6yZYSNzPxacP6/S0qGu9i/cUcWn7bC9sr+IHo1bdjOsZHs8Xh45nN4TSlu2F/D0 IHnd8i8wR1dTa+lsUicgDWTTMoEocNQqXWq5RnL+rJWOlbAyu9xamu7d9dcjc2HKxOcJ Z3cg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ocAFvnUl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id ada2fe7eead31-4b68a2fa089si1377661137.302.2025.01.17.10.33.19 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 17 Jan 2025 10:33:20 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ocAFvnUl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tYr1v-00040e-8t; Fri, 17 Jan 2025 13:25:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tYr1s-0003yQ-NE for qemu-devel@nongnu.org; Fri, 17 Jan 2025 13:25:12 -0500 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tYr1q-0007r9-PR for qemu-devel@nongnu.org; Fri, 17 Jan 2025 13:25:12 -0500 Received: by mail-pl1-x62a.google.com with SMTP id d9443c01a7336-21669fd5c7cso45849125ad.3 for ; Fri, 17 Jan 2025 10:25:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1737138309; x=1737743109; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wWOubo1yw/jMK9n7npaDQ/kdBR0LHc4+hHuxEbmZxkw=; b=ocAFvnUlPu/0w5IUFBYl7jRv8B88wNs+ry6v1cxdDxAujF+qFMUBrI+tPCnxUVAVKd j6aKtfSp7ao4BnU2vuLyBxoyyzhTXGndWUKR6VxQvr77z232JRjGeBnLRaroENIOWGHw W33VoJc+tJp1PcjEfnUADlNDnFcp/jpIwhVDRXfvJDpdwur/VENy8aSfWzBfHXRj9Oyt zMBvPVZEMl+sVJgFnJOu12oe02s0eC+t1yFYckwX9mmeKoTkWY45Ud/OrBrkUuep7ZV1 4/zYKUKS0sNb2KlFyDGUw2DkHOVlHvebw1OGjmBLCyrfZrelv89aZvfI0cLmvjF0qCQk EK2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1737138309; x=1737743109; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wWOubo1yw/jMK9n7npaDQ/kdBR0LHc4+hHuxEbmZxkw=; b=GBzOqzCnJwO+NPYUN2e6d/VYJHCqOwB6sQecyfdr/ajlSnEJJQCCoVFlfQukTsMLjE LMMNRNDKp6mjTSWVGFFy2HDmsrq4vELNHBhZZWObV4f0F5MUPljviLvsQlL/DE5VsHT+ PjyGfwziG2DE60uDfAMYcEdg0aT/0Utc2W78m48aflfVWUOcCNoiYdV1gUAhpmbJNiTp T2drecy//MA+ivgCtTreI6Zn+3tmma1VcpfDRIKE238sCw+p8GkSy2kp3HLL1JVs9RMg +trbKmO5JRf4Ur9iTCco1HbAD2oFqSAgRjQYmnobyHSxJcdmM07Dgp8yozDQ5qAmDmsC Rnnw== X-Gm-Message-State: AOJu0Yx4LJaEJepPq7SYWg+XRHnoYmDVkfC/TYtcXrTuNOTGFSyCJ9rN Xbc0OO20Zrr+JMIhrMFiDJe4aIsK3GfSGunz2yuGsKxHxjE8OnUH0KhNPhItj/sZjRJ6DbXXY5w C X-Gm-Gg: ASbGncuXiwP9ehC12uN29pupSwVEXbCD92oq3cXxJYkDL6XHjR+Yl2pFZJtRLpNsros 0L20ZW1adrNUzicV5tYss+jGzY0xve4+JWBOtkT+P1CZ3RyU62W60RWewb1BAsLBZUe05Coezmr P7B0OnYVoYGkow0weIzll3CKv3jJ/EVV31ItH+3dOYJsM14yxa0AF6cbpOTX4gfd8nXzk/3VC13 vldhuM5cefxxRq7hLXxXb0LNCZO9zVatwdScP8JQpbXgYzI5QYh0XTPy6K3GxHI0PCEcQ8V2UH4 G8UO65tB83foQYA= X-Received: by 2002:a17:902:d4c8:b0:216:725c:a11a with SMTP id d9443c01a7336-21c352c8145mr62648135ad.10.1737138308995; Fri, 17 Jan 2025 10:25:08 -0800 (PST) Received: from stoup.. (174-21-71-127.tukw.qwest.net. [174.21.71.127]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21c2d3acccesm18879005ad.123.2025.01.17.10.25.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jan 2025 10:25:08 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 16/68] tcg: Rename tcg-target.opc.h to tcg-target-opc.h.inc Date: Fri, 17 Jan 2025 10:24:04 -0800 Message-ID: <20250117182456.2077110-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250117182456.2077110-1-richard.henderson@linaro.org> References: <20250117182456.2077110-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In addition, add empty files for mips, sparc64 and tci. Make the include unconditional within tcg-opc.h. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/tcg/tcg-opc.h | 4 +--- tcg/aarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/arm/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/i386/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/loongarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/mips/tcg-target-opc.h.inc | 1 + tcg/ppc/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/riscv/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/s390x/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/sparc64/tcg-target-opc.h.inc | 1 + tcg/tci/tcg-target-opc.h.inc | 1 + 11 files changed, 4 insertions(+), 3 deletions(-) rename tcg/aarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) rename tcg/arm/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) rename tcg/i386/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) rename tcg/loongarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) create mode 100644 tcg/mips/tcg-target-opc.h.inc rename tcg/ppc/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) rename tcg/riscv/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) rename tcg/s390x/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) create mode 100644 tcg/sparc64/tcg-target-opc.h.inc create mode 100644 tcg/tci/tcg-target-opc.h.inc diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h index 546eb49c11..93622f3f6b 100644 --- a/include/tcg/tcg-opc.h +++ b/include/tcg/tcg-opc.h @@ -301,9 +301,7 @@ DEF(cmpsel_vec, 1, 4, 1, IMPLVEC | IMPL(TCG_TARGET_HAS_cmpsel_vec)) DEF(last_generic, 0, 0, 0, TCG_OPF_NOT_PRESENT) -#if TCG_TARGET_MAYBE_vec -#include "tcg-target.opc.h" -#endif +#include "tcg-target-opc.h.inc" #ifdef TCG_TARGET_INTERPRETER /* These opcodes are only for use between the tci generator and interpreter. */ diff --git a/tcg/aarch64/tcg-target.opc.h b/tcg/aarch64/tcg-target-opc.h.inc similarity index 100% rename from tcg/aarch64/tcg-target.opc.h rename to tcg/aarch64/tcg-target-opc.h.inc diff --git a/tcg/arm/tcg-target.opc.h b/tcg/arm/tcg-target-opc.h.inc similarity index 100% rename from tcg/arm/tcg-target.opc.h rename to tcg/arm/tcg-target-opc.h.inc diff --git a/tcg/i386/tcg-target.opc.h b/tcg/i386/tcg-target-opc.h.inc similarity index 100% rename from tcg/i386/tcg-target.opc.h rename to tcg/i386/tcg-target-opc.h.inc diff --git a/tcg/loongarch64/tcg-target.opc.h b/tcg/loongarch64/tcg-target-opc.h.inc similarity index 100% rename from tcg/loongarch64/tcg-target.opc.h rename to tcg/loongarch64/tcg-target-opc.h.inc diff --git a/tcg/mips/tcg-target-opc.h.inc b/tcg/mips/tcg-target-opc.h.inc new file mode 100644 index 0000000000..84e777bfe5 --- /dev/null +++ b/tcg/mips/tcg-target-opc.h.inc @@ -0,0 +1 @@ +/* No target specific opcodes. */ diff --git a/tcg/ppc/tcg-target.opc.h b/tcg/ppc/tcg-target-opc.h.inc similarity index 100% rename from tcg/ppc/tcg-target.opc.h rename to tcg/ppc/tcg-target-opc.h.inc diff --git a/tcg/riscv/tcg-target.opc.h b/tcg/riscv/tcg-target-opc.h.inc similarity index 100% rename from tcg/riscv/tcg-target.opc.h rename to tcg/riscv/tcg-target-opc.h.inc diff --git a/tcg/s390x/tcg-target.opc.h b/tcg/s390x/tcg-target-opc.h.inc similarity index 100% rename from tcg/s390x/tcg-target.opc.h rename to tcg/s390x/tcg-target-opc.h.inc diff --git a/tcg/sparc64/tcg-target-opc.h.inc b/tcg/sparc64/tcg-target-opc.h.inc new file mode 100644 index 0000000000..84e777bfe5 --- /dev/null +++ b/tcg/sparc64/tcg-target-opc.h.inc @@ -0,0 +1 @@ +/* No target specific opcodes. */ diff --git a/tcg/tci/tcg-target-opc.h.inc b/tcg/tci/tcg-target-opc.h.inc new file mode 100644 index 0000000000..84e777bfe5 --- /dev/null +++ b/tcg/tci/tcg-target-opc.h.inc @@ -0,0 +1 @@ +/* No target specific opcodes. */