@@ -117,7 +117,6 @@ typedef enum VirtGICType {
struct VirtMachineClass {
MachineClass parent;
- bool disallow_affinity_adjustment;
bool no_its;
bool no_tcg_its;
bool claim_edge_triggered_timers;
@@ -68,7 +68,6 @@
#include "qom/object.h"
/* Number of SGI target-list bits */
-#define GIC_TARGETLIST_BITS 8
#define GIC_MAX_PRIORITY_BITS 8
#define GIC_MIN_PRIORITY_BITS 4
@@ -45,9 +45,6 @@
#define GICV3_REDIST_SIZE 0x20000
#define GICV4_REDIST_SIZE 0x40000
-/* Number of SGI target-list bits */
-#define GICV3_TARGETLIST_BITS 16
-
/* Maximum number of list registers (architectural limit) */
#define GICV3_LR_MAX 16
@@ -1760,23 +1760,7 @@ void virt_machine_done(Notifier *notifier, void *data)
static uint64_t virt_cpu_mp_affinity(VirtMachineState *vms, int idx)
{
uint8_t clustersz = ARM_DEFAULT_CPUS_PER_CLUSTER;
- VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
- if (!vmc->disallow_affinity_adjustment) {
- /* Adjust MPIDR like 64-bit KVM hosts, which incorporate the
- * GIC's target-list limitations. 32-bit KVM hosts currently
- * always create clusters of 4 CPUs, but that is expected to
- * change when they gain support for gicv3. When KVM is enabled
- * it will override the changes we make here, therefore our
- * purposes are to make TCG consistent (with 64-bit KVM hosts)
- * and to improve SGI efficiency.
- */
- if (vms->gic_version == VIRT_GIC_VERSION_2) {
- clustersz = GIC_TARGETLIST_BITS;
- } else {
- clustersz = GICV3_TARGETLIST_BITS;
- }
- }
return arm_build_mp_affinity(idx, clustersz);
}
The VirtMachineClass::disallow_affinity_adjustment field was only used by virt-2.6 machine, which got removed. Remove it along with the GIC*_TARGETLIST_BITS definitions, and simplify virt_cpu_mp_affinity(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- include/hw/arm/virt.h | 1 - include/hw/intc/arm_gic.h | 1 - include/hw/intc/arm_gicv3_common.h | 3 --- hw/arm/virt.c | 16 ---------------- 4 files changed, 21 deletions(-)