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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436ed48f4b2sm140328005e9.24.2025.01.13.11.56.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 13 Jan 2025 11:56:22 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paul Burton , Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen Subject: [PATCH v2 11/19] hw/mips/bootloader: Propagate CPU to bl_gen_jump_[to, kernel]() Date: Mon, 13 Jan 2025 20:55:17 +0100 Message-ID: <20250113195525.57150-12-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113195525.57150-1-philmd@linaro.org> References: <20250113195525.57150-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target agnostic CPU pointer to the publicly declared bl_gen_jump_to() and bl_gen_jump_kernel() functions. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/mips/bootloader.h | 6 ++++-- hw/mips/bootloader.c | 6 +++--- hw/mips/boston.c | 2 +- hw/mips/fuloong2e.c | 2 +- hw/mips/malta.c | 2 +- 5 files changed, 10 insertions(+), 8 deletions(-) diff --git a/include/hw/mips/bootloader.h b/include/hw/mips/bootloader.h index bc54ea8c7fb..173410f54ea 100644 --- a/include/hw/mips/bootloader.h +++ b/include/hw/mips/bootloader.h @@ -15,14 +15,16 @@ /** * bl_gen_jump_to: Generate bootloader code to jump to an address * + * @cpu: The MIPS CPU which will run the bootloader code * @ptr: Pointer to buffer where to write the bootloader code * @jump_addr: Address to jump to */ -void bl_gen_jump_to(void **ptr, target_ulong jump_addr); +void bl_gen_jump_to(const MIPSCPU *cpu, void **ptr, target_ulong jump_addr); /** * bl_gen_jump_kernel: Generate bootloader code to jump to a Linux kernel * + * @cpu: The MIPS CPU which will run the bootloader code * @ptr: Pointer to buffer where to write the bootloader code * @set_sp: Whether to set $sp register * @set_a0: Whether to set $a0 register @@ -36,7 +38,7 @@ void bl_gen_jump_to(void **ptr, target_ulong jump_addr); * @a3: Value to set $a0 to if @set_a3 is set * @kernel_addr: Start address of the kernel to jump to */ -void bl_gen_jump_kernel(void **ptr, +void bl_gen_jump_kernel(const MIPSCPU *cpu, void **ptr, bool set_sp, target_ulong sp, bool set_a0, target_ulong a0, bool set_a1, target_ulong a1, diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 7db3bf7511f..9b074d9903b 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -243,14 +243,14 @@ static void bl_gen_load_ulong(void **p, bl_reg rt, target_ulong imm) } /* Helpers */ -void bl_gen_jump_to(void **p, target_ulong jump_addr) +void bl_gen_jump_to(const MIPSCPU *cpu, void **p, target_ulong jump_addr) { bl_gen_load_ulong(p, BL_REG_T9, jump_addr); bl_gen_jalr(p, BL_REG_T9); bl_gen_nop(p); /* delay slot */ } -void bl_gen_jump_kernel(void **p, +void bl_gen_jump_kernel(const MIPSCPU *cpu, void **p, bool set_sp, target_ulong sp, bool set_a0, target_ulong a0, bool set_a1, target_ulong a1, @@ -274,7 +274,7 @@ void bl_gen_jump_kernel(void **p, bl_gen_load_ulong(p, BL_REG_A3, a3); } - bl_gen_jump_to(p, kernel_addr); + bl_gen_jump_to(cpu, p, kernel_addr); } void bl_gen_write_ulong(const MIPSCPU *cpu, void **p, diff --git a/hw/mips/boston.c b/hw/mips/boston.c index b646c104df7..f2c0e335e73 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -353,7 +353,7 @@ static void gen_firmware(const MIPSCPU *cpu, void *p, * a2/$6 = 0 * a3/$7 = 0 */ - bl_gen_jump_kernel(&p, + bl_gen_jump_kernel(cpu, &p, true, 0, true, (int32_t)-2, true, fdt_addr, true, 0, true, 0, kernel_entry); diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index c4080a8a6e3..1e55adacdd2 100644 --- a/hw/mips/fuloong2e.c +++ b/hw/mips/fuloong2e.c @@ -179,7 +179,7 @@ static void write_bootloader(const MIPSCPU *cpu, uint8_t *base, /* Second part of the bootloader */ p = (uint32_t *)(base + 0x040); - bl_gen_jump_kernel((void **)&p, + bl_gen_jump_kernel(cpu, (void **)&p, true, ENVP_VADDR - 64, true, 2, true, ENVP_VADDR, true, ENVP_VADDR + 8, diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 9bc3fc9da3e..f96a78d2939 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -681,7 +681,7 @@ static void bl_setup_gt64120_jump_kernel(MaltaState *s, void **p, cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0xcfc), tswap32(ldl_be_p(pci_pins_cfg))); - bl_gen_jump_kernel(p, + bl_gen_jump_kernel(cpu, p, true, ENVP_VADDR - 64, /* * If semihosting is used, arguments have already