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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a8e4b82a4sm10918902f8f.72.2025.01.12.16.49.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:15 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 15/23] hw/mips/bootloader: Propagate CPU to bl_gen_write_ulong() Date: Mon, 13 Jan 2025 01:47:40 +0100 Message-ID: <20250113004748.41658-16-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target agnostic CPU pointer to the publicly declared bl_gen_write_ulong() function. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/mips/bootloader.h | 3 ++- hw/mips/bootloader.c | 13 +++++++------ 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/include/hw/mips/bootloader.h b/include/hw/mips/bootloader.h index 6b58eafb8bc..a7f174e16bc 100644 --- a/include/hw/mips/bootloader.h +++ b/include/hw/mips/bootloader.h @@ -20,7 +20,8 @@ void bl_gen_jump_kernel(const MIPSCPU *cpu, void **ptr, bool set_a2, target_ulong a2, bool set_a3, target_ulong a3, target_ulong kernel_addr); -void bl_gen_write_ulong(void **ptr, target_ulong addr, target_ulong val); +void bl_gen_write_ulong(const MIPSCPU *cpu, void **ptr, + target_ulong addr, target_ulong val); void bl_gen_write_u32(void **ptr, target_ulong addr, uint32_t val); void bl_gen_write_u64(void **ptr, target_ulong addr, uint64_t val); diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 9804051ab2d..c4fd85b9f42 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -283,14 +283,15 @@ void bl_gen_jump_kernel(const MIPSCPU *cpu, void **p, bl_gen_jump_to(cpu, p, kernel_addr); } -void bl_gen_write_ulong(void **p, target_ulong addr, target_ulong val) +void bl_gen_write_ulong(const MIPSCPU *cpu, void **p, + target_ulong addr, target_ulong val) { - bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, val); - bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_K1, addr); - if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { - bl_gen_sd(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); + bl_gen_load_ulong(&cpu->env, p, BL_REG_K0, val); + bl_gen_load_ulong(&cpu->env, p, BL_REG_K1, addr); + if (bootcpu_supports_isa(&cpu->env, ISA_MIPS3)) { + bl_gen_sd(&cpu->env, p, BL_REG_K0, BL_REG_K1, 0x0); } else { - bl_gen_sw(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); + bl_gen_sw(&cpu->env, p, BL_REG_K0, BL_REG_K1, 0x0); } }