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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436f04df606sm94008945e9.12.2025.01.12.16.49.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:05 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 13/23] hw/mips/bootloader: Propagate CPU to bl_gen_jump_to() Date: Mon, 13 Jan 2025 01:47:38 +0100 Message-ID: <20250113004748.41658-14-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target agnostic CPU pointer to the publicly declared bl_gen_jump_to() function. Include "target/mips/cpu-qom.h" to get MIPSCPU typedef. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/mips/bootloader.h | 3 ++- hw/mips/bootloader.c | 10 +++++----- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/include/hw/mips/bootloader.h b/include/hw/mips/bootloader.h index c32f6c28356..daa2b92e249 100644 --- a/include/hw/mips/bootloader.h +++ b/include/hw/mips/bootloader.h @@ -10,8 +10,9 @@ #define HW_MIPS_BOOTLOADER_H #include "exec/cpu-defs.h" +#include "target/mips/cpu-qom.h" -void bl_gen_jump_to(void **ptr, target_ulong jump_addr); +void bl_gen_jump_to(const MIPSCPU *cpu, void **ptr, target_ulong jump_addr); void bl_gen_jump_kernel(void **ptr, bool set_sp, target_ulong sp, bool set_a0, target_ulong a0, diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index e29eb5e92f3..6f055228392 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -249,11 +249,11 @@ static void bl_gen_load_ulong(const CPUMIPSState *env, void **p, } /* Helpers */ -void bl_gen_jump_to(void **p, target_ulong jump_addr) +void bl_gen_jump_to(const MIPSCPU *cpu, void **p, target_ulong jump_addr) { - bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_T9, jump_addr); - bl_gen_jalr(&MIPS_CPU(first_cpu)->env, p, BL_REG_T9); - bl_gen_nop(&MIPS_CPU(first_cpu)->env, p); /* delay slot */ + bl_gen_load_ulong(&cpu->env, p, BL_REG_T9, jump_addr); + bl_gen_jalr(&cpu->env, p, BL_REG_T9); + bl_gen_nop(&cpu->env, p); /* delay slot */ } void bl_gen_jump_kernel(void **p, @@ -280,7 +280,7 @@ void bl_gen_jump_kernel(void **p, bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_A3, a3); } - bl_gen_jump_to(p, kernel_addr); + bl_gen_jump_to(MIPS_CPU(first_cpu), p, kernel_addr); } void bl_gen_write_ulong(void **p, target_ulong addr, target_ulong val)