diff mbox series

[11/23] hw/mips/bootloader: Propagate CPU env to bl_gen_dli()

Message ID 20250113004748.41658-12-philmd@linaro.org
State New
Headers show
Series hw/mips: Remove all uses of &first_cpu | expand

Commit Message

Philippe Mathieu-Daudé Jan. 13, 2025, 12:47 a.m. UTC
Propagate the target specific CPU env to the locally
declared bl_gen_dli() function.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/mips/bootloader.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c
index 32811e48cdd..95ee59f33c9 100644
--- a/hw/mips/bootloader.c
+++ b/hw/mips/bootloader.c
@@ -228,19 +228,20 @@  static void bl_gen_li(const CPUMIPSState *env, void **p,
     }
 }
 
-static void bl_gen_dli(void **p, bl_reg rt, uint64_t imm)
+static void bl_gen_dli(const CPUMIPSState *env, void **p,
+                       bl_reg rt, uint64_t imm)
 {
-    bl_gen_li(&MIPS_CPU(first_cpu)->env, p, rt, extract64(imm, 32, 32));
-    bl_gen_dsll(&MIPS_CPU(first_cpu)->env, p, rt, rt, 16);
+    bl_gen_li(env, p, rt, extract64(imm, 32, 32));
+    bl_gen_dsll(env, p, rt, rt, 16);
     bl_gen_ori(p, rt, rt, extract64(imm, 16, 16));
-    bl_gen_dsll(&MIPS_CPU(first_cpu)->env, p, rt, rt, 16);
+    bl_gen_dsll(env, p, rt, rt, 16);
     bl_gen_ori(p, rt, rt, extract64(imm, 0, 16));
 }
 
 static void bl_gen_load_ulong(void **p, bl_reg rt, target_ulong imm)
 {
     if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) {
-        bl_gen_dli(p, rt, imm); /* 64bit */
+        bl_gen_dli(&MIPS_CPU(first_cpu)->env, p, rt, imm); /* 64bit */
     } else {
         bl_gen_li(&MIPS_CPU(first_cpu)->env, p, rt, imm); /* 32bit */
     }
@@ -301,7 +302,7 @@  void bl_gen_write_u32(void **p, target_ulong addr, uint32_t val)
 
 void bl_gen_write_u64(void **p, target_ulong addr, uint64_t val)
 {
-    bl_gen_dli(p, BL_REG_K0, val);
+    bl_gen_dli(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, val);
     bl_gen_load_ulong(p, BL_REG_K1, addr);
     bl_gen_sd(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0);
 }