| Message ID | 20250102181601.1421059-2-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | tcg/riscv: Use BEXTI for single-bit extractions | expand |
On Fri, Jan 3, 2025 at 4:28 AM Richard Henderson <richard.henderson@linaro.org> wrote: > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > host/include/riscv/host/cpuinfo.h | 5 +++-- > util/cpuinfo-riscv.c | 18 ++++++++++++++++-- > 2 files changed, 19 insertions(+), 4 deletions(-) > > diff --git a/host/include/riscv/host/cpuinfo.h b/host/include/riscv/host/cpuinfo.h > index cdc784e7b6..b2b53dbf62 100644 > --- a/host/include/riscv/host/cpuinfo.h > +++ b/host/include/riscv/host/cpuinfo.h > @@ -9,8 +9,9 @@ > #define CPUINFO_ALWAYS (1u << 0) /* so cpuinfo is nonzero */ > #define CPUINFO_ZBA (1u << 1) > #define CPUINFO_ZBB (1u << 2) > -#define CPUINFO_ZICOND (1u << 3) > -#define CPUINFO_ZVE64X (1u << 4) > +#define CPUINFO_ZBS (1u << 3) > +#define CPUINFO_ZICOND (1u << 4) > +#define CPUINFO_ZVE64X (1u << 5) > > /* Initialized with a constructor. */ > extern unsigned cpuinfo; > diff --git a/util/cpuinfo-riscv.c b/util/cpuinfo-riscv.c > index 971c924012..0291b7218a 100644 > --- a/util/cpuinfo-riscv.c > +++ b/util/cpuinfo-riscv.c > @@ -36,7 +36,8 @@ static void sigill_handler(int signo, siginfo_t *si, void *data) > /* Called both as constructor and (possibly) via other constructors. */ > unsigned __attribute__((constructor)) cpuinfo_init(void) > { > - unsigned left = CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZICOND | CPUINFO_ZVE64X; > + unsigned left = CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZBS > + | CPUINFO_ZICOND | CPUINFO_ZVE64X; > unsigned info = cpuinfo; > > if (info) { > @@ -50,6 +51,9 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) > #if defined(__riscv_arch_test) && defined(__riscv_zbb) > info |= CPUINFO_ZBB; > #endif > +#if defined(__riscv_arch_test) && defined(__riscv_zbs) > + info |= CPUINFO_ZBS; > +#endif > #if defined(__riscv_arch_test) && defined(__riscv_zicond) > info |= CPUINFO_ZICOND; > #endif > @@ -71,7 +75,8 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) > && pair.key >= 0) { > info |= pair.value & RISCV_HWPROBE_EXT_ZBA ? CPUINFO_ZBA : 0; > info |= pair.value & RISCV_HWPROBE_EXT_ZBB ? CPUINFO_ZBB : 0; > - left &= ~(CPUINFO_ZBA | CPUINFO_ZBB); > + info |= pair.value & RISCV_HWPROBE_EXT_ZBS ? CPUINFO_ZBS : 0; > + left &= ~(CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZBS); > #ifdef RISCV_HWPROBE_EXT_ZICOND > info |= pair.value & RISCV_HWPROBE_EXT_ZICOND ? CPUINFO_ZICOND : 0; > left &= ~CPUINFO_ZICOND; > @@ -117,6 +122,15 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) > left &= ~CPUINFO_ZBB; > } > > + if (left & CPUINFO_ZBS) { > + /* Probe for Zbs: bext zero,zero,zero. */ > + got_sigill = 0; > + asm volatile(".insn r 0x33, 5, 0x24, zero, zero, zero" > + : : : "memory"); > + info |= got_sigill ? 0 : CPUINFO_ZBS; > + left &= ~CPUINFO_ZBS; > + } > + > if (left & CPUINFO_ZICOND) { > /* Probe for Zicond: czero.eqz zero,zero,zero. */ > got_sigill = 0; > -- > 2.43.0 > >
diff --git a/host/include/riscv/host/cpuinfo.h b/host/include/riscv/host/cpuinfo.h index cdc784e7b6..b2b53dbf62 100644 --- a/host/include/riscv/host/cpuinfo.h +++ b/host/include/riscv/host/cpuinfo.h @@ -9,8 +9,9 @@ #define CPUINFO_ALWAYS (1u << 0) /* so cpuinfo is nonzero */ #define CPUINFO_ZBA (1u << 1) #define CPUINFO_ZBB (1u << 2) -#define CPUINFO_ZICOND (1u << 3) -#define CPUINFO_ZVE64X (1u << 4) +#define CPUINFO_ZBS (1u << 3) +#define CPUINFO_ZICOND (1u << 4) +#define CPUINFO_ZVE64X (1u << 5) /* Initialized with a constructor. */ extern unsigned cpuinfo; diff --git a/util/cpuinfo-riscv.c b/util/cpuinfo-riscv.c index 971c924012..0291b7218a 100644 --- a/util/cpuinfo-riscv.c +++ b/util/cpuinfo-riscv.c @@ -36,7 +36,8 @@ static void sigill_handler(int signo, siginfo_t *si, void *data) /* Called both as constructor and (possibly) via other constructors. */ unsigned __attribute__((constructor)) cpuinfo_init(void) { - unsigned left = CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZICOND | CPUINFO_ZVE64X; + unsigned left = CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZBS + | CPUINFO_ZICOND | CPUINFO_ZVE64X; unsigned info = cpuinfo; if (info) { @@ -50,6 +51,9 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) #if defined(__riscv_arch_test) && defined(__riscv_zbb) info |= CPUINFO_ZBB; #endif +#if defined(__riscv_arch_test) && defined(__riscv_zbs) + info |= CPUINFO_ZBS; +#endif #if defined(__riscv_arch_test) && defined(__riscv_zicond) info |= CPUINFO_ZICOND; #endif @@ -71,7 +75,8 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) && pair.key >= 0) { info |= pair.value & RISCV_HWPROBE_EXT_ZBA ? CPUINFO_ZBA : 0; info |= pair.value & RISCV_HWPROBE_EXT_ZBB ? CPUINFO_ZBB : 0; - left &= ~(CPUINFO_ZBA | CPUINFO_ZBB); + info |= pair.value & RISCV_HWPROBE_EXT_ZBS ? CPUINFO_ZBS : 0; + left &= ~(CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZBS); #ifdef RISCV_HWPROBE_EXT_ZICOND info |= pair.value & RISCV_HWPROBE_EXT_ZICOND ? CPUINFO_ZICOND : 0; left &= ~CPUINFO_ZICOND; @@ -117,6 +122,15 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) left &= ~CPUINFO_ZBB; } + if (left & CPUINFO_ZBS) { + /* Probe for Zbs: bext zero,zero,zero. */ + got_sigill = 0; + asm volatile(".insn r 0x33, 5, 0x24, zero, zero, zero" + : : : "memory"); + info |= got_sigill ? 0 : CPUINFO_ZBS; + left &= ~CPUINFO_ZBS; + } + if (left & CPUINFO_ZICOND) { /* Probe for Zicond: czero.eqz zero,zero,zero. */ got_sigill = 0;
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- host/include/riscv/host/cpuinfo.h | 5 +++-- util/cpuinfo-riscv.c | 18 ++++++++++++++++-- 2 files changed, 19 insertions(+), 4 deletions(-)