| Message ID | 20250102180654.1420056-17-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | tcg: Merge *_i32 and *_i64 opcodes | expand |
On 2/1/25 19:05, Richard Henderson wrote: > In addition, add empty files for mips, sparc64 and tci. > Make the include unconditional within tcg-opc.h. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > include/tcg/tcg-opc.h | 4 +--- > tcg/aarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 > tcg/arm/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 > tcg/i386/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 > tcg/loongarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 > tcg/mips/tcg-target-opc.h.inc | 1 + > tcg/ppc/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 > tcg/riscv/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 > tcg/s390x/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 > tcg/sparc64/tcg-target-opc.h.inc | 1 + > tcg/tci/tcg-target-opc.h.inc | 1 + > 11 files changed, 4 insertions(+), 3 deletions(-) > rename tcg/aarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) > rename tcg/arm/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) > rename tcg/i386/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) > rename tcg/loongarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) > create mode 100644 tcg/mips/tcg-target-opc.h.inc > rename tcg/ppc/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) > rename tcg/riscv/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) > rename tcg/s390x/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) > create mode 100644 tcg/sparc64/tcg-target-opc.h.inc > create mode 100644 tcg/tci/tcg-target-opc.h.inc Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h index 546eb49c11..93622f3f6b 100644 --- a/include/tcg/tcg-opc.h +++ b/include/tcg/tcg-opc.h @@ -301,9 +301,7 @@ DEF(cmpsel_vec, 1, 4, 1, IMPLVEC | IMPL(TCG_TARGET_HAS_cmpsel_vec)) DEF(last_generic, 0, 0, 0, TCG_OPF_NOT_PRESENT) -#if TCG_TARGET_MAYBE_vec -#include "tcg-target.opc.h" -#endif +#include "tcg-target-opc.h.inc" #ifdef TCG_TARGET_INTERPRETER /* These opcodes are only for use between the tci generator and interpreter. */ diff --git a/tcg/aarch64/tcg-target.opc.h b/tcg/aarch64/tcg-target-opc.h.inc similarity index 100% rename from tcg/aarch64/tcg-target.opc.h rename to tcg/aarch64/tcg-target-opc.h.inc diff --git a/tcg/arm/tcg-target.opc.h b/tcg/arm/tcg-target-opc.h.inc similarity index 100% rename from tcg/arm/tcg-target.opc.h rename to tcg/arm/tcg-target-opc.h.inc diff --git a/tcg/i386/tcg-target.opc.h b/tcg/i386/tcg-target-opc.h.inc similarity index 100% rename from tcg/i386/tcg-target.opc.h rename to tcg/i386/tcg-target-opc.h.inc diff --git a/tcg/loongarch64/tcg-target.opc.h b/tcg/loongarch64/tcg-target-opc.h.inc similarity index 100% rename from tcg/loongarch64/tcg-target.opc.h rename to tcg/loongarch64/tcg-target-opc.h.inc diff --git a/tcg/mips/tcg-target-opc.h.inc b/tcg/mips/tcg-target-opc.h.inc new file mode 100644 index 0000000000..84e777bfe5 --- /dev/null +++ b/tcg/mips/tcg-target-opc.h.inc @@ -0,0 +1 @@ +/* No target specific opcodes. */ diff --git a/tcg/ppc/tcg-target.opc.h b/tcg/ppc/tcg-target-opc.h.inc similarity index 100% rename from tcg/ppc/tcg-target.opc.h rename to tcg/ppc/tcg-target-opc.h.inc diff --git a/tcg/riscv/tcg-target.opc.h b/tcg/riscv/tcg-target-opc.h.inc similarity index 100% rename from tcg/riscv/tcg-target.opc.h rename to tcg/riscv/tcg-target-opc.h.inc diff --git a/tcg/s390x/tcg-target.opc.h b/tcg/s390x/tcg-target-opc.h.inc similarity index 100% rename from tcg/s390x/tcg-target.opc.h rename to tcg/s390x/tcg-target-opc.h.inc diff --git a/tcg/sparc64/tcg-target-opc.h.inc b/tcg/sparc64/tcg-target-opc.h.inc new file mode 100644 index 0000000000..84e777bfe5 --- /dev/null +++ b/tcg/sparc64/tcg-target-opc.h.inc @@ -0,0 +1 @@ +/* No target specific opcodes. */ diff --git a/tcg/tci/tcg-target-opc.h.inc b/tcg/tci/tcg-target-opc.h.inc new file mode 100644 index 0000000000..84e777bfe5 --- /dev/null +++ b/tcg/tci/tcg-target-opc.h.inc @@ -0,0 +1 @@ +/* No target specific opcodes. */
In addition, add empty files for mips, sparc64 and tci. Make the include unconditional within tcg-opc.h. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- include/tcg/tcg-opc.h | 4 +--- tcg/aarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/arm/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/i386/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/loongarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/mips/tcg-target-opc.h.inc | 1 + tcg/ppc/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/riscv/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/s390x/{tcg-target.opc.h => tcg-target-opc.h.inc} | 0 tcg/sparc64/tcg-target-opc.h.inc | 1 + tcg/tci/tcg-target-opc.h.inc | 1 + 11 files changed, 4 insertions(+), 3 deletions(-) rename tcg/aarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) rename tcg/arm/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) rename tcg/i386/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) rename tcg/loongarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) create mode 100644 tcg/mips/tcg-target-opc.h.inc rename tcg/ppc/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) rename tcg/riscv/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) rename tcg/s390x/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%) create mode 100644 tcg/sparc64/tcg-target-opc.h.inc create mode 100644 tcg/tci/tcg-target-opc.h.inc