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[209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-4635aaeaf02si103252221cf.422.2024.11.18.04.48.52 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 18 Nov 2024 04:48:52 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LpJW46pf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tD1BH-0004Y5-N9; Mon, 18 Nov 2024 07:48:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tD1AQ-00044y-Db for qemu-devel@nongnu.org; Mon, 18 Nov 2024 07:47:50 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tD1AO-0005Qa-EZ for qemu-devel@nongnu.org; Mon, 18 Nov 2024 07:47:46 -0500 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-4316cce103dso29026285e9.3 for ; Mon, 18 Nov 2024 04:47:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1731934062; x=1732538862; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ivNPlPth2SDoxFGmnFqTJP3RbkCwlecXTja5E4n2oyQ=; b=LpJW46pfNKOoEuCQ/SIqWbD9LmiUwR4SSsLDLuSiHBIc2uzqC4PkR1Z6Aac+h/P39Y MQFS2zV11FjajsD7/67kohR8/eIz0fhsQNlOttKl79yaSRNM1lvp4XWJJDyVwKtOH8du NecVL4oRJbGikXFSysTFRADZFNiKHT4FE/BY4+tsRlo70DDr3UWCVamY98XPrjQ0rGwv V2A4hOF+WceYkTFk5tiohViCrDcn6HGJ6eq8IT2oOygYzK5MHg0EQq6WrZ9qUsRAFqrI 3xwy9wOLYIfXtivB9II3maOWxVbXEr3e0rRSfdEUiRINnBhKQy46WWaOIZXxn8vPZNUC HWvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731934062; x=1732538862; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ivNPlPth2SDoxFGmnFqTJP3RbkCwlecXTja5E4n2oyQ=; b=B/RCGupStOUq/ZHfE/uXmBBbpqpz7nHgKHfa20g7jSxm2fmi+BWyfl614eprWyyRDa cUDOrAmwY6oqMuRKONOW3ENGxk5DMIt3TJkJtN3UT5SwhunXSRThk3uoEGZ3TUjywVh3 rCA5ZJpGeJmFkelFeJ79bi8k6J4vfbu9zmg/Dz8luUpX+4kXt06LTY2B+BOHtvc8BNPv VKUhqj7DcMLBMk8v0TKRqXa9G7UfLoyIHxWqbY3HJMYhZ6iBIotuIhVg8PPbcNr8XxMK YLK0IuD+bSIHdZWFknivQVb/jxVxQgimfALyg/FKbyqGz/FxVlShCfT3617bLypv+gzS bLPQ== X-Gm-Message-State: AOJu0Yz8lR3OxbizO7DYBH2cUBlMwZ4ovksBSWpAc4ktaeZ0jWk6MvVk iwPnlgKvC5NdwDVm30p2wprJP9v/CXO/5HkvV6kYZmQEyZ2pex/1U8urV/GUM4RmARFqqJMzScP d X-Received: by 2002:a05:600c:1e18:b0:42c:a387:6a6f with SMTP id 5b1f17b1804b1-432df78f3c1mr121231735e9.20.1731934062603; Mon, 18 Nov 2024 04:47:42 -0800 (PST) Received: from localhost.localdomain ([176.187.198.1]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432da244cb6sm161593995e9.0.2024.11.18.04.47.41 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Nov 2024 04:47:42 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland Subject: [PULL 10/15] hw/misc/mos6522: Fix bad class definition of the MOS6522 device Date: Mon, 18 Nov 2024 13:46:37 +0100 Message-ID: <20241118124643.6958-11-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241118124643.6958-1-philmd@linaro.org> References: <20241118124643.6958-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Thomas Huth When compiling QEMU with --enable-cfi, the "q800" m68k machine currently crashes very early, when the q800_machine_init() function tries to wire the interrupts of the "via1" device. This happens because TYPE_MOS6522_Q800_VIA1 is supposed to be a proper SysBus device, but its parent (TYPE_MOS6522) has a mistake in its class definition where it is only derived from DeviceClass, and not from SysBusDeviceClass, so we end up in funny memory access issues here. Using the right class hierarchy for the MOS6522 device fixes the problem. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2675 Signed-off-by: Thomas Huth Fixes: 51f233ec92 ("misc: introduce new mos6522 VIA device") Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland Message-ID: <20241114104653.963812-1-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/misc/mos6522.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/misc/mos6522.h b/include/hw/misc/mos6522.h index fba45668ab..920871a598 100644 --- a/include/hw/misc/mos6522.h +++ b/include/hw/misc/mos6522.h @@ -154,7 +154,7 @@ struct MOS6522State { OBJECT_DECLARE_TYPE(MOS6522State, MOS6522DeviceClass, MOS6522) struct MOS6522DeviceClass { - DeviceClass parent_class; + SysBusDeviceClass parent_class; ResettablePhases parent_phases; void (*portB_write)(MOS6522State *dev);