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[11/12] target/mips: Remove target-specific code in mips_cpu_reset_hold()

Message ID 20240930091101.40591-12-philmd@linaro.org
State New
Headers show
Series target/mips: Remove target-specific endianness knowledge | expand

Commit Message

Philippe Mathieu-Daudé Sept. 30, 2024, 9:11 a.m. UTC 
Since all code creating vCPUs now set the 'cpu-big-endian' property,
we can remove the target-specific #ifdef'ry in mips_cpu_reset_hold():
the CP0C0_BE bit is set using the property cpu->is_big_endian value.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/mips/cpu.c | 3 ---
 1 file changed, 3 deletions(-)
diff mbox series

Patch

diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 02e2e72f2d..9724e71a5e 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -202,9 +202,6 @@  static void mips_cpu_reset_hold(Object *obj, ResetType type)
     env->CP0_PRid = env->cpu_model->CP0_PRid;
     env->CP0_Config0 = deposit32(env->cpu_model->CP0_Config0,
                                  CP0C0_BE, 1, cpu->is_big_endian);
-#if TARGET_BIG_ENDIAN
-    env->CP0_Config0 |= (1 << CP0C0_BE);
-#endif
     env->CP0_Config1 = env->cpu_model->CP0_Config1;
     env->CP0_Config2 = env->cpu_model->CP0_Config2;
     env->CP0_Config3 = env->cpu_model->CP0_Config3;