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Tue, 10 Sep 2024 07:13:53 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id A628E63460; Tue, 10 Sep 2024 15:07:35 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Zhao Liu , Marcel Apfelbaum , Beraldo Leal , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Alexandre Iooss , =?utf-8?q?Alex_Benn=C3=A9e?= , Pierrick Bouvier , Yanan Wang , Peter Maydell , Mahmoud Mandour , Thomas Huth , qemu-arm@nongnu.org, devel@lists.libvirt.org, Jiaxun Yang , Paolo Bonzini , Richard Henderson , Wainer dos Santos Moschetta Subject: [PATCH 20/26] tests/tcg: only read/write 64 bit words on 64 bit systems Date: Tue, 10 Sep 2024 15:07:27 +0100 Message-Id: <20240910140733.4007719-21-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240910140733.4007719-1-alex.bennee@linaro.org> References: <20240910140733.4007719-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org While the compilers will generally happily synthesise a 64 bit value for you on 32 bit systems it doesn't exercise anything on QEMU. It also makes it hard to accurately compare the accesses to test_data when instrumenting. Signed-off-by: Alex Bennée Reviewed-by: Pierrick Bouvier --- tests/tcg/multiarch/system/memory.c | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-) diff --git a/tests/tcg/multiarch/system/memory.c b/tests/tcg/multiarch/system/memory.c index 8f2371975d..680dd4800b 100644 --- a/tests/tcg/multiarch/system/memory.c +++ b/tests/tcg/multiarch/system/memory.c @@ -163,6 +163,7 @@ static void init_test_data_u32(int offset) ml_printf("done %d @ %p\n", i, ptr); } +#if __SIZEOF_POINTER__ == 8 static void init_test_data_u64(int offset) { uint8_t count = 0; @@ -187,6 +188,7 @@ static void init_test_data_u64(int offset) } ml_printf("done %d @ %p\n", i, ptr); } +#endif static bool read_test_data_u16(int offset) { @@ -254,6 +256,7 @@ static bool read_test_data_u32(int offset) return true; } +#if __SIZEOF_POINTER__ == 8 static bool read_test_data_u64(int offset) { uint64_t word, *ptr = (uint64_t *)&test_data[offset]; @@ -307,11 +310,16 @@ static bool read_test_data_u64(int offset) ml_printf("done %d @ %p\n", i, ptr); return true; } +#endif /* Read the test data and verify at various offsets */ -read_ufn read_ufns[] = { read_test_data_u16, - read_test_data_u32, - read_test_data_u64 }; +read_ufn read_ufns[] = { + read_test_data_u16, + read_test_data_u32, +#if __SIZEOF_POINTER__ == 8 + read_test_data_u64 +#endif +}; bool do_unsigned_reads(int start_off) { @@ -476,10 +484,14 @@ bool do_signed_reads(bool neg_first) return ok; } -init_ufn init_ufns[] = { init_test_data_u8, - init_test_data_u16, - init_test_data_u32, - init_test_data_u64 }; +init_ufn init_ufns[] = { + init_test_data_u8, + init_test_data_u16, + init_test_data_u32, +#if __SIZEOF_POINTER__ == 8 + init_test_data_u64 +#endif +}; int main(void) {